#****************************************************************************** # SimultaneousControl.rbm # # (c) Copyright 2011 # National Instruments Corporation. # All rights reserved. # License: NATIONAL INSTRUMENTS SOFTWARE LICENSE AGREEMENT # Refer to "MHDDK License Agreement.pdf" in the root of this distribution. # # Description: # rbm file for SimultaneousControl. # This file is autogenerated. Do not modify it directly. # # All lines starting with # or C are comments # All lines starting with T define a register Type # All lines starting with TR define register name, type, offset # All lines starting with F are Fields within the preceding register, # Its name, size, attribute (Strobe|.) and type are defined. # #****************************************************************************** # Declaring RBM as a containable chip object. # This means all instances must specify an offset for it. --containable # Default access mode (can be overridden). String must exactly match, # with capitalization, a valid strategy name. --generate-include "tSimultaneousControlValues.h" #=============================================================================== # Register Group AiConfiguration #=============================================================================== #------------------------------------------------------------------------------- # AISetChannelOrder Register Definition R AISetChannelOrder 8 0x0D Writable --no-soft-copy F AiChannel 4 @ Current channel active for configuration. F Reserved 4 #------------------------------------------------------------------------------- # AIChanConfigCtrlStat Register Definition R AIChanConfigCtrlStat 8 0x0E Readable|Writable --no-soft-copy F AiGain 2 @ Write to set the gain for the active AI Channel. Voltage ranges: @ "00" = 5V Range, "01"= 10V Range, "10" = 2V Range, "11" = 1V Range. F Reserved 6 #------------------------------------------------------------------------------- # AIClearChannelOrder Register Definition R AIClearChannelOrder 8 0x0F Writable --no-soft-copy F AiClearConfig 1 Strobe @ The AI Clear Channel Configuration Register clears the channel @ ordering/selection and the gain for all the AI channels. This @ must be done always at the start of each acquisition task @ Writing a one to this bit clears the channel order and voltage @ ranges. This must be done at the start of each acquisition @ task. This bit clears itself. F Reserved 7 #------------------------------------------------------------------------------- # AITriggerConfigCtrlStat Register Definition R AITriggerConfigCtrlStat 8 0x10 Readable|Writable F AiTrigSel 5 @ Write to set the MUX for the AI Trigger. @! AiTrigSel(4~3) => "00" Main , "01" Ext, "10" APFI0, "11" APFI1 @! AiTrigSel(2~0) => "000" Channel 0 (Main), Channel 8 (Ext) @! AiTrigSel(2~0) => "001" Channel 1 (Main), Channel 9 (Ext) @! AiTrigSel(2~0) => "010" Channel 2 (Main), Channel 10 (Ext) @! AiTrigSel(2~0) => "011" Channel 3 (Main), Channel 11 (Ext) @! AiTrigSel(2~0) => "100" Channel 4 (Main), Channel 12 (Ext) @! AiTrigSel(2~0) => "101" Channel 5 (Main), Channel 13 (Ext) @! AiTrigSel(2~0) => "110" Channel 6 (Main), Channel 14 (Ext) @! AiTrigSel(2~0) => "111" Channel 7 (Main), Channel 15 (Ext) F Reserved 3 #------------------------------------------------------------------------------- # AcquisitionCtrl Register Definition R AcquisitionCtrl 8 0x1B Readable|Writable --no-soft-copy F AcquisitionDone 1 . tBoolean @ Write Only. SW writes to this bit to indicate the last CONVERT. F ExtendedChannelsPresent 1 . tBoolean @ Read Only. Reflects the status of the ExtendedChannelsPresent signal F Reserved 6 #=============================================================================== # Register Group AiFifo #=============================================================================== #------------------------------------------------------------------------------- # AiFifoCtrlStat Register Definition R AiFifoCtrlStat 8 0x14 Writable|Readable --no-hardware-reset true --no-soft-copy F SampleStranded 1 . tBoolean @ Read Only. Reading this bit as a "1" indicates that a sample @ exists that has not been written into the AI FIFO. F NotEmpty 1 . tBoolean @ Read Only. Read this bit to returns a '1' if the AI FIFO has @ data in it. F SetFifoIn16BitMode 1 . tBoolean @ Write/Read. Write a '1' to set the FIFO into 16-bit wide mode. @ Writing a '0' has no effect. This bit clears itself . F ClrFifoIn16BitMode 1 . tBoolean @ Write/Read. Write a '1' to set the FIFO in 32-bit wide mode. @ Writing a '0' has no effect. This bit clears itself . F Reserved 1 F Reserved 2 F ResetAiFifo 1 . tBoolean @ Write Only. Write to reset the FIFO. Software needs to clear @ this signal, it does not clear itself. #=============================================================================== # Register Group Loopback #=============================================================================== #------------------------------------------------------------------------------- # LoopbackCtrlStat Register Definition R LoopbackCtrlStat 8 0x15 Readable|Writable --no-soft-copy F SetLoopNeg 1 . tBoolean @ Write a '1' to enable LoopNeg. Reading a '1' means Loopback is @ enabled. F ClrLoopNeg 1 . tBoolean @ Write a '1' to disable LoopNeg. Reading a '1' means Loopback @ is disabled. F SetLoopPos 1 . tBoolean @ Write a '1' to enable LoopPos. Reading a '1' means Loopback is @ enabled. F ClrLoopPos 1 . tBoolean @ Write a '1' to disable LoopPos. Reading a '1' means Loopback @ is disabled. F Reserved 4 #------------------------------------------------------------------------------- # LoopbackSourceSel Register Definition R LoopbackSourceSel 8 0x16 Readable|Writable --no-hardware-reset true F LoopbackMuxSel 5 @ Write to select the source of the Loopback Mux. A read returns @ its current channel selected. @! "00000" _aiGnd_vs_aiGnd @! "00100" _ao0_vs_aoGnd @! "00101" _ao1_vs_aoGnd @! "00110" _ao2_vs_aoGnd @! "00111" _ao3_vs_aoGnd F Reserved 3 #=============================================================================== # Register Group DcmRegisters #=============================================================================== #------------------------------------------------------------------------------- # DcmCtrlStat Register Definition R DcmCtrlStat 8 0x1C Readable|Writable --no-hardware-reset true --no-soft-copy F SetExtDcmReset 1 . tBoolean @ Write to this to assert the DCM Reset. F ClrExtDcmReset 1 . tBoolean @ Write to this to clear the DCM Reset. F ExtDcmResetStatus 1 . tBoolean @ Reading this bit indicates the current status of the DCM Reset @ signal. F ExtDcmIsLocked 1 . tBoolean @ Read to this to verify the lock status of the DCM. F SetStc3DcmReset 1 . tBoolean @ Write to this to assert the DCM Reset. F ClrStc3DcmReset 1 . tBoolean @ Write to this to clear the DCM Reset. F Stc3DcmResetStatus 1 . tBoolean @ Reading this bit indicates the current status of the DCM Reset @ signal. F Stc3DcmIsLocked 1 . tBoolean @ Read to this to verify the lock status of the DCM. #=============================================================================== # Register Group Interrupts #=============================================================================== #------------------------------------------------------------------------------- # InterruptControl Register Definition R InterruptControl 8 0x1A Writable --no-soft-copy F Reserved 2 F AiFifoOverflowInterruptAck 1 Strobe @ Write a "1" to acknowledge the interrupt. The interrupt will @ not deassert if the condition that caused it is still pending. @ Writing a 0 has no effect. F AiFifoOverflowInterruptDisable 1 Strobe @ Write a "1" to disable the corresponding interrupt. Writing a @ "0" has no effect. F AiFifoOverflowInterruptEnable 1 Strobe @ Write a "1" to enable the corresponding interrupt. Writing a @ "0" has no effect. F Reserved 1 F GlobalInterruptDisable 1 Strobe @ Write a "1" to disable the corresponding interrupt. Writing a @ "0" has no effect. F GlobalInterruptEnable 1 Strobe @ Write a "1" to enable the corresponding interrupt. Writing a @ "0" has no effect. #------------------------------------------------------------------------------- # InterruptStatus Register Definition R InterruptStatus 8 0x1A Readable --no-soft-copy F AiFifoOverflowInterruptCondition 1 . tBoolean @ Reading these bit returns a "1" if the corresponding condition @ is true. The aIntOut pin may or may not be asserted depending @ on whether the corresponding Interrupt Enable is true. Writing @ these bits has no effect. F AiFifoOverflowInterruptStatus 1 . tBoolean @ Reading these bits returns a "1" if the corresponding interrupt @ is actively causing the aIntOut pin to assert. F Reserved 2 F AiFifoOverflowInterruptEnabled 1 . tBoolean @ Reading this bit returns the status of the interrupt enable. F GlobalInterruptCondition 1 . tBoolean @ Reading this bit returns a "1" if the corresponding condition @ is true. The aIntOut pin may or may not be asserted depending @ on whether the corresponding Interrupt Enable is true. Writing @ these bits has no effect. F GlobalInterruptStatus 1 . tBoolean @ Reading this bit returns a "1" if pin "aIntOut" is asserted. F GlobalInterruptEnabled 1 . tBoolean @ Reading this bit returns the status of the interrupt enable. #=============================================================================== # Register Group Required #=============================================================================== #------------------------------------------------------------------------------- # SignatureYear Register Definition R SignatureYear 8 0x0 Readable F [SignatureYear_]Default 8 #------------------------------------------------------------------------------- # SignatureMonth Register Definition R SignatureMonth 8 0x01 Readable F [SignatureMonth_]Default 8 #------------------------------------------------------------------------------- # SignatureDay Register Definition R SignatureDay 8 0x02 Readable F [SignatureDay_]Default 8 #------------------------------------------------------------------------------- # SignatureHour Register Definition R SignatureHour 8 0x03 Readable F [SignatureHour_]Default 8 #------------------------------------------------------------------------------- # Scratch Register Definition R Scratch 8 0x0C Readable|Writable F [Scratch_]Default 8 #=============================================================================== # Register Group Temperature #=============================================================================== #------------------------------------------------------------------------------- # TempSensorCtrlStat Register Definition R TempSensorCtrlStat 8 0x17 Readable|Writable --no-hardware-reset true --no-soft-copy F TempStart 1 Strobe @ Write to start a read to the serial Temp Sensor. F TempReady 1 Strobe @ Read to check when new Temp Sensor data is available. F Reserved 6 #------------------------------------------------------------------------------- # TempSensorDataHi Register Definition R TempSensorDataHi 8 0x18 Readable F TempUpperByte 8 @ Binary Two's complement temperature. #------------------------------------------------------------------------------- # TempSensorDataLo Register Definition R TempSensorDataLo 8 0x19 Readable F TempLowerByte 8 @ Binary Two's complement temperature.