#******************************************************************************
# DO.rbm
#
# (c) Copyright 2011
# National Instruments Corporation.
# All rights reserved.
# License: NATIONAL INSTRUMENTS SOFTWARE LICENSE AGREEMENT
# Refer to "MHDDK License Agreement.pdf" in the root of this distribution.
#
# Description:
# rbm file for DO.
# This file is autogenerated. Do not modify it directly.
#
# All lines starting with # or C are comments
# All lines starting with T define a register Type
# All lines starting with TR define register name, type, offset
# All lines starting with F are Fields within the preceding register,
# Its name, size, attribute (Strobe|.) and type are defined.
#
#******************************************************************************
# Declaring RBM as a containable chip object.
# This means all instances must specify an offset for it.
--containable
# Specify the location of the contained OutTimer object
# contained within the AO engine.
--contains DO_Timer 0x34 OutTimer.rbm "tOutTimer.h"
--generate-include "tDOValues.h"
#===============================================================================
# Register Group Enumerated_Types
#===============================================================================
#-------------------------------------------------------------------------------
# Enumerated type DO_DataWidth_t
#-------------------------------------------------------------------------------
E DO_DataWidth_t
V DO_OneByte 0
V DO_TwoBytes 1
V DO_FourBytes 2
#-------------------------------------------------------------------------------
# Enumerated type DO_Data_Lane_t
#-------------------------------------------------------------------------------
E DO_Data_Lane_t
V DO_DataLane0 0
V DO_DataLane1 1
V DO_DataLane2 2
V DO_DataLane3 3
#-------------------------------------------------------------------------------
# Enumerated type DO_External_Gate_Select_t
#-------------------------------------------------------------------------------
E DO_External_Gate_Select_t
V Gate_Disabled 0
V Gate_PFI0 1
V Gate_PFI1 2
V Gate_PFI2 3
V Gate_PFI3 4
V Gate_PFI4 5
V Gate_PFI5 6
V Gate_PFI6 7
V Gate_PFI7 8
V Gate_PFI8 9
V Gate_PFI9 10
V Gate_RTSI0 11
V Gate_RTSI1 12
V Gate_RTSI2 13
V Gate_RTSI3 14
V Gate_RTSI4 15
V Gate_RTSI5 16
V Gate_RTSI6 17
V Gate_PXIe_DStarA 18
V Gate_PXIe_DStarB 19
V Gate_Star_Trigger 20
V Gate_PFI10 21
V Gate_PFI11 22
V Gate_PFI12 23
V Gate_PFI13 24
V Gate_PFI14 25
V Gate_PFI15 26
V Gate_RTSI7 27
V Gate_Analog_Trigger 30
V Gate_Low 31
V Gate_G0_Out 32
V Gate_G1_Out 33
V Gate_G2_Out 34
V Gate_G3_Out 35
V Gate_G0_Gate 36
V Gate_G1_Gate 37
V Gate_G2_Gate 38
V Gate_G3_Gate 39
V Gate_AI_Gate 40
V Gate_DI_Gate 41
V Gate_AO_Gate 44
V Gate_IntTriggerA0 53
V Gate_IntTriggerA1 54
V Gate_IntTriggerA2 55
V Gate_IntTriggerA3 56
V Gate_IntTriggerA4 57
V Gate_IntTriggerA5 58
V Gate_IntTriggerA6 59
V Gate_IntTriggerA7 60
#-------------------------------------------------------------------------------
# Enumerated type DO_LineDir_t
#-------------------------------------------------------------------------------
E DO_LineDir_t
V Input 0
V Output 1
#-------------------------------------------------------------------------------
# Enumerated type DO_Polarity_t
#-------------------------------------------------------------------------------
E DO_Polarity_t
V Rising_Edge 0
V Falling_Edge 1
#-------------------------------------------------------------------------------
# Enumerated type DO_START1_Select_t
#-------------------------------------------------------------------------------
E DO_START1_Select_t
V Start1_Pulse 0
V Start1_PFI0 1
V Start1_PFI1 2
V Start1_PFI2 3
V Start1_PFI3 4
V Start1_PFI4 5
V Start1_PFI5 6
V Start1_PFI6 7
V Start1_PFI7 8
V Start1_PFI8 9
V Start1_PFI9 10
V Start1_RTSI0 11
V Start1_RTSI1 12
V Start1_RTSI2 13
V Start1_RTSI3 14
V Start1_RTSI4 15
V Start1_RTSI5 16
V Start1_RTSI6 17
V Start1_AI_Start2 18
V Start1_AI_Start1 19
V Start1_Star_Trigger 20
V Start1_PFI10 21
V Start1_PFI11 22
V Start1_PFI12 23
V Start1_PFI13 24
V Start1_PFI14 25
V Start1_PFI15 26
V Start1_RTSI7 27
V Start1_PXIe_DStarA 28
V Start1_PXIe_DStarB 29
V Start1_Analog_Trigger 30
V Start1_Low 31
V Start1_G0_Out 32
V Start1_G1_Out 33
V Start1_G2_Out 34
V Start1_G3_Out 35
V Start1_DIO_ChgDetect 36
V Start1_DI_Start1 37
V Start1_DI_Start2 38
V Start1_AO_Start1 43
V Start1_IntTriggerA0 53
V Start1_IntTriggerA1 54
V Start1_IntTriggerA2 55
V Start1_IntTriggerA3 56
V Start1_IntTriggerA4 57
V Start1_IntTriggerA5 58
V Start1_IntTriggerA6 59
V Start1_IntTriggerA7 60
V Start1_FifoCondition 61
#-------------------------------------------------------------------------------
# Enumerated type DO_TimedMask_t
#-------------------------------------------------------------------------------
E DO_TimedMask_t
V StaticDIO 0
V CDOEngine 1
#-------------------------------------------------------------------------------
# Enumerated type DO_UPDATE_Source_Select_t
#-------------------------------------------------------------------------------
E DO_UPDATE_Source_Select_t
V Update_UI_TC 0
V Update_PFI0 1
V Update_PFI1 2
V Update_PFI2 3
V Update_PFI3 4
V Update_PFI4 5
V Update_PFI5 6
V Update_PFI6 7
V Update_PFI7 8
V Update_PFI8 9
V Update_PFI9 10
V Update_RTSI0 11
V Update_RTSI1 12
V Update_RTSI2 13
V Update_RTSI3 14
V Update_RTSI4 15
V Update_RTSI5 16
V Update_RTSI6 17
V Update_G0_Out 18
V Update_G1_Out 19
V Update_Star_Trigger 20
V Update_PFI10 21
V Update_PFI11 22
V Update_PFI12 23
V Update_PFI13 24
V Update_PFI14 25
V Update_PFI15 26
V Update_RTSI7 27
V Update_G2_Out 28
V Update_G3_Out 29
V Update_Analog_Trigger 30
V Update_Low 31
V Update_PXIe_DStarA 32
V Update_PXIe_DStarB 33
V Update_DIO_ChgDetect 34
V Update_G0_SampleClk 35
V Update_G1_SampleClk 36
V Update_G2_SampleClk 37
V Update_G3_SampleClk 38
V Update_AI_Convert 39
V Update_AI_Start 40
V Update_DI_Convert 41
V Update_AO_Update 44
V Update_IntTriggerA0 53
V Update_IntTriggerA1 54
V Update_IntTriggerA2 55
V Update_IntTriggerA3 56
V Update_IntTriggerA4 57
V Update_IntTriggerA5 58
V Update_IntTriggerA6 59
V Update_IntTriggerA7 60
V Update_FreqOut 61
#-------------------------------------------------------------------------------
# Enumerated type DO_WDT_Mode_t
#-------------------------------------------------------------------------------
E DO_WDT_Mode_t
V WDT_Disabled 0
V WDT_Freeze 1
V WDT_Tristate 2
V WDT_SafeValue 3
#===============================================================================
# Register Group DO
#===============================================================================
#-------------------------------------------------------------------------------
# DO_FIFO_St_Register Register Definition
R DO_FIFO_St_Register 32 0x0 Readable
F DO_FIFO_FullCount 16
@ This bitfield represents the number of samples that remain in
@ the DO data FIFO
F Reserved 16
#-------------------------------------------------------------------------------
# SCXI_DIO_Enable_Register Register Definition
R SCXI_DIO_Enable_Register 8 0x0 Writable
F SCXI_DIO_MOSI_Enable 1
@ Set this bit to enable the SCXI_MOSI signal to be output onto
@ DIO0.
F SCXI_DIO_D_A_Enable 1
@ Set this bit to enable the SCXI_D_A signal to be output onto
@ DIO1.
F SCXI_DIO_Intr_Enable 1
@ Set this bit to enable the SCXI_Intr signal to be output onto
@ DIO2.
F Reserved 5
#-------------------------------------------------------------------------------
# Static_Digital_Output_Register Register Definition
R Static_Digital_Output_Register 32 0x4 Writable --no-hardware-reset true
F DO_StaticValue 32
@ Static digital output data. The data written in this register
@ will be output to the digital lines when: The corresponding
@ line is set as an output (kDIODirection_Pini = 1)
@ The DO_Mask_Enable Register is set for static output
@ (CDO_Mask(i) = 0) The SCXI_DIO_Enable_Register is
@ set to output static DIO on lines 2:0 The Watchdog
@ Timer functionality isn't enabled or its timer hasn't triggered
@
#-------------------------------------------------------------------------------
# DIO_Direction_Register Register Definition
R DIO_Direction_Register 32 0x8 Writable --no-hardware-reset true
F kDIODirection_Pin0 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin1 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin2 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin3 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin4 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin5 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin6 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin7 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin8 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin9 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin10 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin11 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin12 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin13 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin14 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin15 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin16 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin17 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin18 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin19 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin20 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin21 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin22 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin23 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin24 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin25 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin26 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin27 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin28 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin29 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin30 1 . nDO::tDO_LineDir_t
F kDIODirection_Pin31 1 . nDO::tDO_LineDir_t
#-------------------------------------------------------------------------------
# CDO_FIFO_Data_Register Register Definition
R CDO_FIFO_Data_Register 32 0xc Writable --no-soft-copy true
F CDO_FIFO_Data 32
@ This register is used to load data into the CDO FIFO.
#-------------------------------------------------------------------------------
# DO_Mask_Enable_Register Register Definition
R DO_Mask_Enable_Register 32 0x10 Writable
F CDO_Mask 32 . nDO::tDO_TimedMask_t
@ Sets on a per bit basis whether the data routed to the output
@ pins on P0 are from the CDO engine, or from static DO
#-------------------------------------------------------------------------------
# DO_Mode_Register Register Definition
R DO_Mode_Register 32 0x14 Writable --initial-value 0x80
F Reserved 1
F Reserved 1
F Reserved 10
F DO_Data_Lane 2 . nDO::tDO_Data_Lane_t
@ Use to determine which byte, word lanes to use for output data.
@ When the DO_DataWidth bitfield is 16 bits If 0, then
@ CDIO_15_0. If 1, then CDIO_31_16.
@ When the DO_DataWidth bitfield is 8 bits If 0, then
@ CDIO_7_0. If 1, then CDIO_15_8. If
@ 2, then CDIO_23_16. If 3, then CDIO_31_24.
@
F DO_DataWidth 2 . nDO::tDO_DataWidth_t
@ Use to determine the width of the data removed from the FIFO.
@ When the FIFO width is programmable, the FIFO width will change
@ with this bitfield. If the FIFO is of a set width, this
@ bitfield in combination with CDO_Data_Lane will determine how
@ the data is smeared across the FIFO data lines. If 0, then
@ data saved is 8-bits. If 1, then 16-bits. If 2, then 32-bits.
@
NOTE: The FIFO must be reset when this bitfield is changed.
F Reserved 16
#-------------------------------------------------------------------------------
# DO_Trigger_Select_Register Register Definition
R DO_Trigger_Select_Register 32 0x18 Writable
F Reserved 8
F DO_External_Gate_Enable 1
@ Setting this bit to 1 enables external gating for the digital
@ output group.
F DO_External_Gate_Polarity 1
@ This bit selects the polarity of the DO external gate signal.
@ When set to 0 the gate is Active high (high enables operation).
@ When set to 1, the gate is Active low (low enables operation)
F DO_External_Gate_Select 6 . nDO::tDO_External_Gate_Select_t
@ This bit enables and selects the external gate
F DO_START1_Edge 1
@ This bit enables edge detection of the DO_START1 trigger. This
@ bit should normally be set to 1. Set this bit to 1 if DO_START1_Select
@ is Start1_Pulse.
F DO_START1_Polarity 1 . nDO::tDO_Polarity_t
@ This bit determines the polarity of DO_START1 trigger
F DO_START1_Select 6 . nDO::tDO_START1_Select_t
@ This bitfield selects the DO_START1 trigger
F Reserved 1
F DO_UPDATE_Source_Polarity 1 . nDO::tDO_Polarity_t
@ This bit selects the active edge of the DO_UPDATE source (the
@ signal that is selected by DO_UPDATE_Source_Select) You must
@ set this bit to 0 in the internal DO_UPDATE mode.
F DO_UPDATE_Source_Select 6 . nDO::tDO_UPDATE_Source_Select_t
@ This bitfield selects the DO_UPDATE source When you set this
@ bit to 0, the DO Timer is in the internal DO_UPDATE mode. When
@ you select any other signal as the DO_UPDATE source, the
@ DO Timer is in the external DO_UPDATE mode.
#-------------------------------------------------------------------------------
# DO_DirectDataRegister Register Definition
R DO_DirectDataRegister 32 0x1C Writable --no-soft-copy true
F CDO_Direct_data 32
@ This register is used to load data into the CDO Engine when the
@ FIFO is disabled
#-------------------------------------------------------------------------------
# DO_WDT_SafeStateRegister Register Definition
R DO_WDT_SafeStateRegister 32 0x24 Writable
F DO_WDT_SafeStateValue 32 Decoded
@ This is the safe value that the DIO lines will go to if the Watchdog
@ Timer is enabled, and the dio lines have the safe state
@ enabled (through the DO_WDT_ModeSelect[i]_Register).
#-------------------------------------------------------------------------------
# DO_WDT_ModeSelect1_Register Register Definition
R DO_WDT_ModeSelect1_Register 32 0x28 Writable
F DO_WDT_ModeD0 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD1 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD2 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD3 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD4 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD5 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD6 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD7 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD8 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD9 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD10 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD11 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD12 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD13 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD14 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD15 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
#-------------------------------------------------------------------------------
# DO_WDT_ModeSelect2_Register Register Definition
R DO_WDT_ModeSelect2_Register 32 0x2C Writable
F DO_WDT_ModeD16 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD17 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD18 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD19 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD20 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD21 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD22 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD23 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD24 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD25 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD26 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD27 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD28 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD29 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD30 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.
F DO_WDT_ModeD31 2 . nDO::tDO_WDT_Mode_t
@ This bitfield determines what action will be taken by the corresponding
@ DO line in the event of a Watchdog Timer event.