// Copyright 2011 National Instruments
// License: NATIONAL INSTRUMENTS SOFTWARE LICENSE AGREEMENT
//   Refer to "MHDDK License Agreement.pdf" in the root of this distribution.

// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!
// This file is autogenerated!!!
// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!

#ifndef ___tInTimer_ipp___
#define ___tInTimer_ipp___

#ifndef ___tInTimer_h___
#include "tInTimer.h"
#endif

#ifndef ___nNIMXRegistermap_tStatus2Ptr_ipp___
#define ___nNIMXRegistermap_tStatus2Ptr_ipp___

typedef nMDBG::tStatus2 nNIMXRegisterMap120_tStatus2;


namespace nNIMXRegisterMap120 {
namespace {

typedef nNIMXRegisterMap120_tStatus2 tStatus2;

inline void setStatus(tStatus2* s, tStatus newStatus)
{
   if (s) s->setCode(newStatus);
}

inline tStatus* toPALStatusPtr(tStatus2* s)
{
   return s ? s->operator tStatus*() : ((tStatus*)NULL);
}

inline tBoolean statusIsFatal(tStatus2* s)
{
   return s && s->isFatal();
}

} // unnamed namespace
} // namespace nNIMXRegisterMap120

#endif // ___nNIMXRegistermap_tStatus2Ptr_ipp___


inline void tInTimer::tReg16IODirect32::write(
   tBusSpaceReference addrSpace,
   u32 offset,
   u16 value,
   nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   addrSpace.write16(offset, value);
}

inline u16 tInTimer::tReg16IODirect32::read(
   tBusSpaceReference addrSpace,
   u32 offset,
   nMDBG::tStatus2* s)
{
   u16 value = (u16)~0;
   if (s && s->isFatal()) return value;
   value = (u16)addrSpace.read16(offset);
   return value;
}

inline void tInTimer::tReg32IODirect32::write(
   tBusSpaceReference addrSpace,
   u32 offset,
   u32 value,
   nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   addrSpace.write32(offset, value);
}

inline u32 tInTimer::tReg32IODirect32::read(
   tBusSpaceReference addrSpace,
   u32 offset,
   nMDBG::tStatus2* s)
{
   u32 value = (u32)~0;
   if (s && s->isFatal()) return value;
   value = addrSpace.read32(offset);
   return value;
}

inline tBusSpaceReference tInTimer::getBusSpaceReference(void) const
{
   return _addrSpace;
}

inline void tInTimer::setAddressOffset(u32 value, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   _addressOffset = value;
}
inline u32 tInTimer::getAddressOffset(nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return 0UL;
   return _addressOffset;
}
inline tBoolean tInTimer::isDirty(tId id, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return kFalse;
   u32 regId = id&0x01FFFFFF;
   if (regId > kMaxRegisterId) {
      nNIMXRegisterMap120::setStatus(s, kStatusBadSelector);
      return kFalse;
   }

   return _dirtyVector[regId];
}

inline void tInTimer::markDirty(tId id, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   u32 regId = id&0x01FFFFFF;

   if (regId > kMaxRegisterId) {
      nNIMXRegisterMap120::setStatus(s, kStatusBadSelector);
      return;
   }

   _dirtyVector[regId] = 1;
}

inline void tInTimer::markClean(tId id, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   u32 regId = id&0x01FFFFFF;

   if (regId > kMaxRegisterId) {
      nNIMXRegisterMap120::setStatus(s, kStatusBadSelector);
      return;
   }

   _dirtyVector[regId] = 0;
}

inline void tInTimer::markDirty(nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   unsigned int i;
   for (i = 0; i < sizeof(_dirtyVector)/sizeof(_dirtyVector[0]); i++) {
      _dirtyVector[i] = 1;
   }
}

inline void tInTimer::markClean(nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   for (unsigned int i = 0; i < sizeof(_dirtyVector)/sizeof(_dirtyVector[0]); i++) {
      _dirtyVector[i] = 0;
   }
}

inline tInTimer::tCommand_Register::tCommand_Register()
{
}

inline tInTimer::tCommand_Register::tRegisterMap* tInTimer::tCommand_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tCommand_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tInTimer::tCommand_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline void tInTimer::tCommand_Register::writeCONVERT_Pulse(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0xfffffffe,s);
}
inline void tInTimer::tCommand_Register::writeSI_Cancel_Load_Switch(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1) & ~0xfffffffd,s);
}
inline void tInTimer::tCommand_Register::writeLOCALMUX_CLK_Pulse(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x2) & ~0xfffffffb,s);
}
inline void tInTimer::tCommand_Register::writeEXTMUX_CLK_Pulse(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x3) & ~0xfffffff7,s);
}
inline void tInTimer::tCommand_Register::writeSC_Load(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x5) & ~0xffffffdf,s);
}
inline void tInTimer::tCommand_Register::writeSC_Arm(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x6) & ~0xffffffbf,s);
}
inline void tInTimer::tCommand_Register::writeDIV_Load(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x7) & ~0xffffff7f,s);
}
inline void tInTimer::tCommand_Register::writeDIV_Arm(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x8) & ~0xfffffeff,s);
}
inline void tInTimer::tCommand_Register::writeSI_Load(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x9) & ~0xfffffdff,s);
}
inline void tInTimer::tCommand_Register::writeSI_Arm(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0xa) & ~0xfffffbff,s);
}
inline void tInTimer::tCommand_Register::writeSI2_Load(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0xb) & ~0xfffff7ff,s);
}
inline void tInTimer::tCommand_Register::writeSI2_Arm(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0xc) & ~0xffffefff,s);
}
inline void tInTimer::tCommand_Register::writeDisarm(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0xd) & ~0xffffdfff,s);
}
inline void tInTimer::tCommand_Register::writeSTART1_Pulse(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x10) & ~0xfffeffff,s);
}
inline void tInTimer::tCommand_Register::writeSTART2_Pulse(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x11) & ~0xfffdffff,s);
}
inline void tInTimer::tCommand_Register::writeSTART_Pulse(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x12) & ~0xfffbffff,s);
}
inline void tInTimer::tCommand_Register::writeSC_Switch_Load_On_TC(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x14) & ~0xffefffff,s);
}
inline void tInTimer::tCommand_Register::writeSI_Switch_Load_On_TC(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x17) & ~0xff7fffff,s);
}
inline void tInTimer::tCommand_Register::writeSI_Switch_Load_On_STOP(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x18) & ~0xfeffffff,s);
}
inline void tInTimer::tCommand_Register::writeSI_Switch_Load_On_SC_TC(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x19) & ~0xfdffffff,s);
}
inline void tInTimer::tCommand_Register::writeSC_PreWaitCountTC_ErrorAck(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1d) & ~0xdfffffff,s);
}
inline void tInTimer::tCommand_Register::writeEnd_On_End_Of_Scan(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1e) & ~0xbfffffff,s);
}
inline void tInTimer::tCommand_Register::writeEnd_On_SC_TC(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1f) & ~0x7fffffff,s);
}
inline tInTimer::tStatus_1_Register::tStatus_1_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tStatus_1_Register::tRegisterMap* tInTimer::tStatus_1_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tStatus_1_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   _softCopy = fieldValue;
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tStatus_1_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tInTimer::tStatus_1_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setFIFO_Request_St(nInTimer::tInTimer_FIFO_Request_St_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffffd) | ((u32(fieldValue) << 0x1) & ~0xfffffffd);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_FIFO_Request_St_t tInTimer::tStatus_1_Register::getFIFO_Request_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_FIFO_Request_St_t((_softCopy & ~0xfffffffd) >> 0x1);
}

inline nInTimer::tInTimer_FIFO_Request_St_t tInTimer::tStatus_1_Register::readFIFO_Request_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getFIFO_Request_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSTOP_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffffef) | ((u32(fieldValue) << 0x4) & ~0xffffffef);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getSTOP_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffffffef) >> 0x4);
}

inline u32 tInTimer::tStatus_1_Register::readSTOP_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSTOP_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSTART_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffffdf) | ((u32(fieldValue) << 0x5) & ~0xffffffdf);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getSTART_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffffffdf) >> 0x5);
}

inline u32 tInTimer::tStatus_1_Register::readSTART_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSTART_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSC_TC_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffffbf) | ((u32(fieldValue) << 0x6) & ~0xffffffbf);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getSC_TC_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffffffbf) >> 0x6);
}

inline u32 tInTimer::tStatus_1_Register::readSC_TC_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSC_TC_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSTART1_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffff7f) | ((u32(fieldValue) << 0x7) & ~0xffffff7f);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getSTART1_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffffff7f) >> 0x7);
}

inline u32 tInTimer::tStatus_1_Register::readSTART1_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSTART1_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSTART2_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffeff) | ((u32(fieldValue) << 0x8) & ~0xfffffeff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getSTART2_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfffffeff) >> 0x8);
}

inline u32 tInTimer::tStatus_1_Register::readSTART2_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSTART2_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSC_TC_Error_St(nInTimer::tInTimer_Error_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffdff) | ((u32(fieldValue) << 0x9) & ~0xfffffdff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Error_t tInTimer::tStatus_1_Register::getSC_TC_Error_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Error_t((_softCopy & ~0xfffffdff) >> 0x9);
}

inline nInTimer::tInTimer_Error_t tInTimer::tStatus_1_Register::readSC_TC_Error_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSC_TC_Error_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setOverflow_St(nInTimer::tInTimer_Error_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffbff) | ((u32(fieldValue) << 0xa) & ~0xfffffbff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Error_t tInTimer::tStatus_1_Register::getOverflow_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Error_t((_softCopy & ~0xfffffbff) >> 0xa);
}

inline nInTimer::tInTimer_Error_t tInTimer::tStatus_1_Register::readOverflow_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getOverflow_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setOverrun_St(nInTimer::tInTimer_Error_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffff7ff) | ((u32(fieldValue) << 0xb) & ~0xfffff7ff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Error_t tInTimer::tStatus_1_Register::getOverrun_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Error_t((_softCopy & ~0xfffff7ff) >> 0xb);
}

inline nInTimer::tInTimer_Error_t tInTimer::tStatus_1_Register::readOverrun_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getOverrun_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setFIFO_Empty_St(nInTimer::tInTimer_FIFO_Empty_St_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffefff) | ((u32(fieldValue) << 0xc) & ~0xffffefff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_FIFO_Empty_St_t tInTimer::tStatus_1_Register::getFIFO_Empty_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_FIFO_Empty_St_t((_softCopy & ~0xffffefff) >> 0xc);
}

inline nInTimer::tInTimer_FIFO_Empty_St_t tInTimer::tStatus_1_Register::readFIFO_Empty_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getFIFO_Empty_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setFIFO_Half_Full_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffdfff) | ((u32(fieldValue) << 0xd) & ~0xffffdfff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getFIFO_Half_Full_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffffdfff) >> 0xd);
}

inline u32 tInTimer::tStatus_1_Register::readFIFO_Half_Full_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getFIFO_Half_Full_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setFIFO_Full_St(nInTimer::tInTimer_FIFO_Full_St_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffbfff) | ((u32(fieldValue) << 0xe) & ~0xffffbfff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_FIFO_Full_St_t tInTimer::tStatus_1_Register::getFIFO_Full_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_FIFO_Full_St_t((_softCopy & ~0xffffbfff) >> 0xe);
}

inline nInTimer::tInTimer_FIFO_Full_St_t tInTimer::tStatus_1_Register::readFIFO_Full_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getFIFO_Full_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setScanOverrun_St(nInTimer::tInTimer_Error_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffff7fff) | ((u32(fieldValue) << 0xf) & ~0xffff7fff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Error_t tInTimer::tStatus_1_Register::getScanOverrun_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Error_t((_softCopy & ~0xffff7fff) >> 0xf);
}

inline nInTimer::tInTimer_Error_t tInTimer::tStatus_1_Register::readScanOverrun_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getScanOverrun_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSC_Armed_St(nInTimer::tInTimer_Disarmed_Armed_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffeffff) | ((u32(fieldValue) << 0x10) & ~0xfffeffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Disarmed_Armed_t tInTimer::tStatus_1_Register::getSC_Armed_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Disarmed_Armed_t((_softCopy & ~0xfffeffff) >> 0x10);
}

inline nInTimer::tInTimer_Disarmed_Armed_t tInTimer::tStatus_1_Register::readSC_Armed_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSC_Armed_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSC_Next_Load_Source_St(nInTimer::tInTimer_Load_A_Load_B_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffdffff) | ((u32(fieldValue) << 0x11) & ~0xfffdffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tStatus_1_Register::getSC_Next_Load_Source_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Load_A_Load_B_t((_softCopy & ~0xfffdffff) >> 0x11);
}

inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tStatus_1_Register::readSC_Next_Load_Source_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSC_Next_Load_Source_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSI_Armed_St(nInTimer::tInTimer_Disarmed_Armed_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfff7ffff) | ((u32(fieldValue) << 0x13) & ~0xfff7ffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Disarmed_Armed_t tInTimer::tStatus_1_Register::getSI_Armed_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Disarmed_Armed_t((_softCopy & ~0xfff7ffff) >> 0x13);
}

inline nInTimer::tInTimer_Disarmed_Armed_t tInTimer::tStatus_1_Register::readSI_Armed_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSI_Armed_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSI_Next_Load_Source_St(nInTimer::tInTimer_Load_A_Load_B_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffefffff) | ((u32(fieldValue) << 0x14) & ~0xffefffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tStatus_1_Register::getSI_Next_Load_Source_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Load_A_Load_B_t((_softCopy & ~0xffefffff) >> 0x14);
}

inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tStatus_1_Register::readSI_Next_Load_Source_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSI_Next_Load_Source_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSI_Counting_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffdfffff) | ((u32(fieldValue) << 0x15) & ~0xffdfffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getSI_Counting_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffdfffff) >> 0x15);
}

inline u32 tInTimer::tStatus_1_Register::readSI_Counting_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSI_Counting_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSI2_Armed_St(nInTimer::tInTimer_Disarmed_Armed_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffbfffff) | ((u32(fieldValue) << 0x16) & ~0xffbfffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Disarmed_Armed_t tInTimer::tStatus_1_Register::getSI2_Armed_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Disarmed_Armed_t((_softCopy & ~0xffbfffff) >> 0x16);
}

inline nInTimer::tInTimer_Disarmed_Armed_t tInTimer::tStatus_1_Register::readSI2_Armed_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSI2_Armed_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSI2_Next_Load_Source_St(nInTimer::tInTimer_Load_A_Load_B_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xff7fffff) | ((u32(fieldValue) << 0x17) & ~0xff7fffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tStatus_1_Register::getSI2_Next_Load_Source_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Load_A_Load_B_t((_softCopy & ~0xff7fffff) >> 0x17);
}

inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tStatus_1_Register::readSI2_Next_Load_Source_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSI2_Next_Load_Source_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setDIV_Armed_St(nInTimer::tInTimer_Disarmed_Armed_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfeffffff) | ((u32(fieldValue) << 0x18) & ~0xfeffffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Disarmed_Armed_t tInTimer::tStatus_1_Register::getDIV_Armed_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Disarmed_Armed_t((_softCopy & ~0xfeffffff) >> 0x18);
}

inline nInTimer::tInTimer_Disarmed_Armed_t tInTimer::tStatus_1_Register::readDIV_Armed_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getDIV_Armed_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSC_Gate_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfdffffff) | ((u32(fieldValue) << 0x19) & ~0xfdffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getSC_Gate_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfdffffff) >> 0x19);
}

inline u32 tInTimer::tStatus_1_Register::readSC_Gate_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSC_Gate_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setStart_Stop_Gate_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfbffffff) | ((u32(fieldValue) << 0x1a) & ~0xfbffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getStart_Stop_Gate_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfbffffff) >> 0x1a);
}

inline u32 tInTimer::tStatus_1_Register::readStart_Stop_Gate_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getStart_Stop_Gate_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSC_PreWaitCountTC_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xf7ffffff) | ((u32(fieldValue) << 0x1b) & ~0xf7ffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getSC_PreWaitCountTC_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xf7ffffff) >> 0x1b);
}

inline u32 tInTimer::tStatus_1_Register::readSC_PreWaitCountTC_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSC_PreWaitCountTC_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setScan_In_Progress_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xefffffff) | ((u32(fieldValue) << 0x1c) & ~0xefffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getScan_In_Progress_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xefffffff) >> 0x1c);
}

inline u32 tInTimer::tStatus_1_Register::readScan_In_Progress_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getScan_In_Progress_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setExternal_Gate_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xdfffffff) | ((u32(fieldValue) << 0x1d) & ~0xdfffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getExternal_Gate_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xdfffffff) >> 0x1d);
}

inline u32 tInTimer::tStatus_1_Register::readExternal_Gate_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getExternal_Gate_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setLast_Shiftin_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xbfffffff) | ((u32(fieldValue) << 0x1e) & ~0xbfffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getLast_Shiftin_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xbfffffff) >> 0x1e);
}

inline u32 tInTimer::tStatus_1_Register::readLast_Shiftin_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getLast_Shiftin_St(s);
}

inline tInTimer::tStatus_1_Register& tInTimer::tStatus_1_Register::setSC_PreWaitCountTC_ErrorSt(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x7fffffff) | ((u32(fieldValue) << 0x1f) & ~0x7fffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_1_Register::getSC_PreWaitCountTC_ErrorSt(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x7fffffff) >> 0x1f);
}

inline u32 tInTimer::tStatus_1_Register::readSC_PreWaitCountTC_ErrorSt(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSC_PreWaitCountTC_ErrorSt(s);
}

inline tInTimer::tMode_1_Register::tMode_1_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tMode_1_Register::tRegisterMap* tInTimer::tMode_1_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tMode_1_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tInTimer::tMode_1_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tMode_1_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tMode_1_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tInTimer::tId)kId, s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tInTimer::tMode_1_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tMode_1_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tInTimer::tMode_1_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline u32 tInTimer::tMode_1_Register::readRegister(nMDBG::tStatus2*)
{
   return _softCopy;
}


inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setExportedConvertPolarity(nInTimer::tInTimer_Polarity_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffffe) | ((u32(fieldValue) << 0x0) & ~0xfffffffe);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Polarity_t tInTimer::tMode_1_Register::getExportedConvertPolarity(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Polarity_t((_softCopy & ~0xfffffffe) >> 0x0);
}

inline void tInTimer::tMode_1_Register::writeExportedConvertPolarity(nInTimer::tInTimer_Polarity_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setExportedConvertPolarity(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Polarity_t tInTimer::tMode_1_Register::readExportedConvertPolarity(nMDBG::tStatus2* s)
{
   return getExportedConvertPolarity(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setSC_Reload_Mode(nInTimer::tInTimer_SC_Reload_Mode_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffffd) | ((u32(fieldValue) << 0x1) & ~0xfffffffd);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_SC_Reload_Mode_t tInTimer::tMode_1_Register::getSC_Reload_Mode(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_SC_Reload_Mode_t((_softCopy & ~0xfffffffd) >> 0x1);
}

inline void tInTimer::tMode_1_Register::writeSC_Reload_Mode(nInTimer::tInTimer_SC_Reload_Mode_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSC_Reload_Mode(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_SC_Reload_Mode_t tInTimer::tMode_1_Register::readSC_Reload_Mode(nMDBG::tStatus2* s)
{
   return getSC_Reload_Mode(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setSC_Initial_Load_Source(nInTimer::tInTimer_Load_A_Load_B_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffffb) | ((u32(fieldValue) << 0x2) & ~0xfffffffb);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tMode_1_Register::getSC_Initial_Load_Source(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Load_A_Load_B_t((_softCopy & ~0xfffffffb) >> 0x2);
}

inline void tInTimer::tMode_1_Register::writeSC_Initial_Load_Source(nInTimer::tInTimer_Load_A_Load_B_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSC_Initial_Load_Source(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tMode_1_Register::readSC_Initial_Load_Source(nMDBG::tStatus2* s)
{
   return getSC_Initial_Load_Source(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setSI_Reload_Mode(nInTimer::tInTimer_SI_Reload_Mode_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffff8f) | ((u32(fieldValue) << 0x4) & ~0xffffff8f);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_SI_Reload_Mode_t tInTimer::tMode_1_Register::getSI_Reload_Mode(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_SI_Reload_Mode_t((_softCopy & ~0xffffff8f) >> 0x4);
}

inline void tInTimer::tMode_1_Register::writeSI_Reload_Mode(nInTimer::tInTimer_SI_Reload_Mode_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI_Reload_Mode(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_SI_Reload_Mode_t tInTimer::tMode_1_Register::readSI_Reload_Mode(nMDBG::tStatus2* s)
{
   return getSI_Reload_Mode(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setSI_Initial_Load_Source(nInTimer::tInTimer_Load_A_Load_B_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffff7f) | ((u32(fieldValue) << 0x7) & ~0xffffff7f);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tMode_1_Register::getSI_Initial_Load_Source(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Load_A_Load_B_t((_softCopy & ~0xffffff7f) >> 0x7);
}

inline void tInTimer::tMode_1_Register::writeSI_Initial_Load_Source(nInTimer::tInTimer_Load_A_Load_B_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI_Initial_Load_Source(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tMode_1_Register::readSI_Initial_Load_Source(nMDBG::tStatus2* s)
{
   return getSI_Initial_Load_Source(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setSI2_Reload_Mode(nInTimer::tInTimer_SI2_Reload_Mode_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffeff) | ((u32(fieldValue) << 0x8) & ~0xfffffeff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_SI2_Reload_Mode_t tInTimer::tMode_1_Register::getSI2_Reload_Mode(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_SI2_Reload_Mode_t((_softCopy & ~0xfffffeff) >> 0x8);
}

inline void tInTimer::tMode_1_Register::writeSI2_Reload_Mode(nInTimer::tInTimer_SI2_Reload_Mode_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI2_Reload_Mode(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_SI2_Reload_Mode_t tInTimer::tMode_1_Register::readSI2_Reload_Mode(nMDBG::tStatus2* s)
{
   return getSI2_Reload_Mode(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setSI2_Initial_Load_Source(nInTimer::tInTimer_Load_A_Load_B_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffdff) | ((u32(fieldValue) << 0x9) & ~0xfffffdff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tMode_1_Register::getSI2_Initial_Load_Source(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Load_A_Load_B_t((_softCopy & ~0xfffffdff) >> 0x9);
}

inline void tInTimer::tMode_1_Register::writeSI2_Initial_Load_Source(nInTimer::tInTimer_Load_A_Load_B_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI2_Initial_Load_Source(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Load_A_Load_B_t tInTimer::tMode_1_Register::readSI2_Initial_Load_Source(nMDBG::tStatus2* s)
{
   return getSI2_Initial_Load_Source(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setExternal_MUX_Present(nInTimer::tInTimer_External_MUX_Present_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffefff) | ((u32(fieldValue) << 0xc) & ~0xffffefff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_External_MUX_Present_t tInTimer::tMode_1_Register::getExternal_MUX_Present(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_External_MUX_Present_t((_softCopy & ~0xffffefff) >> 0xc);
}

inline void tInTimer::tMode_1_Register::writeExternal_MUX_Present(nInTimer::tInTimer_External_MUX_Present_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setExternal_MUX_Present(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_External_MUX_Present_t tInTimer::tMode_1_Register::readExternal_MUX_Present(nMDBG::tStatus2* s)
{
   return getExternal_MUX_Present(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setPre_Trigger(nInTimer::tInTimer_Pre_Trigger_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffdfff) | ((u32(fieldValue) << 0xd) & ~0xffffdfff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Pre_Trigger_t tInTimer::tMode_1_Register::getPre_Trigger(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Pre_Trigger_t((_softCopy & ~0xffffdfff) >> 0xd);
}

inline void tInTimer::tMode_1_Register::writePre_Trigger(nInTimer::tInTimer_Pre_Trigger_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setPre_Trigger(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Pre_Trigger_t tInTimer::tMode_1_Register::readPre_Trigger(nMDBG::tStatus2* s)
{
   return getPre_Trigger(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setStart_Stop_Gate_Enable(nInTimer::tInTimer_Disabled_Enabled_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffbfff) | ((u32(fieldValue) << 0xe) & ~0xffffbfff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Disabled_Enabled_t tInTimer::tMode_1_Register::getStart_Stop_Gate_Enable(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Disabled_Enabled_t((_softCopy & ~0xffffbfff) >> 0xe);
}

inline void tInTimer::tMode_1_Register::writeStart_Stop_Gate_Enable(nInTimer::tInTimer_Disabled_Enabled_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setStart_Stop_Gate_Enable(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Disabled_Enabled_t tInTimer::tMode_1_Register::readStart_Stop_Gate_Enable(nMDBG::tStatus2* s)
{
   return getStart_Stop_Gate_Enable(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setTrigger_Once(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffeffff) | ((u32(fieldValue) << 0x10) & ~0xfffeffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tMode_1_Register::getTrigger_Once(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfffeffff) >> 0x10);
}

inline void tInTimer::tMode_1_Register::writeTrigger_Once(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setTrigger_Once(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tMode_1_Register::readTrigger_Once(nMDBG::tStatus2* s)
{
   return getTrigger_Once(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setContinuous(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffdffff) | ((u32(fieldValue) << 0x11) & ~0xfffdffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tMode_1_Register::getContinuous(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfffdffff) >> 0x11);
}

inline void tInTimer::tMode_1_Register::writeContinuous(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setContinuous(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tMode_1_Register::readContinuous(nMDBG::tStatus2* s)
{
   return getContinuous(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setSI_Source_Polarity(nInTimer::tInTimer_SI_Source_Polarity_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffefffff) | ((u32(fieldValue) << 0x14) & ~0xffefffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_SI_Source_Polarity_t tInTimer::tMode_1_Register::getSI_Source_Polarity(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_SI_Source_Polarity_t((_softCopy & ~0xffefffff) >> 0x14);
}

inline void tInTimer::tMode_1_Register::writeSI_Source_Polarity(nInTimer::tInTimer_SI_Source_Polarity_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI_Source_Polarity(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_SI_Source_Polarity_t tInTimer::tMode_1_Register::readSI_Source_Polarity(nMDBG::tStatus2* s)
{
   return getSI_Source_Polarity(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setSI_Source_Select(nInTimer::tInTimer_SI_Source_Select_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xf83fffff) | ((u32(fieldValue) << 0x16) & ~0xf83fffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_SI_Source_Select_t tInTimer::tMode_1_Register::getSI_Source_Select(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_SI_Source_Select_t((_softCopy & ~0xf83fffff) >> 0x16);
}

inline void tInTimer::tMode_1_Register::writeSI_Source_Select(nInTimer::tInTimer_SI_Source_Select_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI_Source_Select(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_SI_Source_Select_t tInTimer::tMode_1_Register::readSI_Source_Select(nMDBG::tStatus2* s)
{
   return getSI_Source_Select(s);
}

inline tInTimer::tMode_1_Register& tInTimer::tMode_1_Register::setSCAN_IN_PROG_Pulse(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x7fffffff) | ((u32(fieldValue) << 0x1f) & ~0x7fffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tMode_1_Register::getSCAN_IN_PROG_Pulse(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x7fffffff) >> 0x1f);
}

inline void tInTimer::tMode_1_Register::writeSCAN_IN_PROG_Pulse(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSCAN_IN_PROG_Pulse(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tMode_1_Register::readSCAN_IN_PROG_Pulse(nMDBG::tStatus2* s)
{
   return getSCAN_IN_PROG_Pulse(s);
}

inline tInTimer::tStatus_2_Register::tStatus_2_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tStatus_2_Register::tRegisterMap* tInTimer::tStatus_2_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tStatus_2_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tInTimer::tStatus_2_Register& tInTimer::tStatus_2_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   _softCopy = fieldValue;
   return *this;
}

inline u32 tInTimer::tStatus_2_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tStatus_2_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tInTimer::tStatus_2_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tInTimer::tStatus_2_Register& tInTimer::tStatus_2_Register::setSI_Load_Switch_Pending_St(nInTimer::tInTimer_SI_Load_Switch_Pending_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffffe) | ((u32(fieldValue) << 0x0) & ~0xfffffffe);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_SI_Load_Switch_Pending_t tInTimer::tStatus_2_Register::getSI_Load_Switch_Pending_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_SI_Load_Switch_Pending_t((_softCopy & ~0xfffffffe) >> 0x0);
}

inline nInTimer::tInTimer_SI_Load_Switch_Pending_t tInTimer::tStatus_2_Register::readSI_Load_Switch_Pending_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSI_Load_Switch_Pending_St(s);
}

inline tInTimer::tStatus_2_Register& tInTimer::tStatus_2_Register::setSC_Q_St(nInTimer::tInTimer_SC_Q_St_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffffe3) | ((u32(fieldValue) << 0x2) & ~0xffffffe3);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_SC_Q_St_t tInTimer::tStatus_2_Register::getSC_Q_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_SC_Q_St_t((_softCopy & ~0xffffffe3) >> 0x2);
}

inline nInTimer::tInTimer_SC_Q_St_t tInTimer::tStatus_2_Register::readSC_Q_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSC_Q_St(s);
}

inline tInTimer::tStatus_2_Register& tInTimer::tStatus_2_Register::setSI2_Q_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffcff) | ((u32(fieldValue) << 0x8) & ~0xfffffcff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_2_Register::getSI2_Q_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfffffcff) >> 0x8);
}

inline u32 tInTimer::tStatus_2_Register::readSI2_Q_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSI2_Q_St(s);
}

inline tInTimer::tStatus_2_Register& tInTimer::tStatus_2_Register::setSI_Q_St(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffcfff) | ((u32(fieldValue) << 0xc) & ~0xffffcfff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tStatus_2_Register::getSI_Q_St(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffffcfff) >> 0xc);
}

inline u32 tInTimer::tStatus_2_Register::readSI_Q_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSI_Q_St(s);
}

inline tInTimer::tStatus_2_Register& tInTimer::tStatus_2_Register::setDIV_Q_St(nInTimer::tInTimer_Idle_Counting_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffff7fff) | ((u32(fieldValue) << 0xf) & ~0xffff7fff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Idle_Counting_t tInTimer::tStatus_2_Register::getDIV_Q_St(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Idle_Counting_t((_softCopy & ~0xffff7fff) >> 0xf);
}

inline nInTimer::tInTimer_Idle_Counting_t tInTimer::tStatus_2_Register::readDIV_Q_St(nMDBG::tStatus2* s)
{
   refresh(s);
   return getDIV_Q_St(s);
}

inline tInTimer::tMode_2_Register::tMode_2_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tMode_2_Register::tRegisterMap* tInTimer::tMode_2_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tMode_2_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tInTimer::tMode_2_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tMode_2_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tMode_2_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tInTimer::tId)kId, s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tInTimer::tMode_2_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tMode_2_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tInTimer::tMode_2_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline u32 tInTimer::tMode_2_Register::readRegister(nMDBG::tStatus2*)
{
   return _softCopy;
}


inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setEXTMUX_CLK_Pulse_Width(nInTimer::tInTimer_EXTMUX_CLK_Pulse_Width_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffffdf) | ((u32(fieldValue) << 0x5) & ~0xffffffdf);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_EXTMUX_CLK_Pulse_Width_t tInTimer::tMode_2_Register::getEXTMUX_CLK_Pulse_Width(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_EXTMUX_CLK_Pulse_Width_t((_softCopy & ~0xffffffdf) >> 0x5);
}

inline void tInTimer::tMode_2_Register::writeEXTMUX_CLK_Pulse_Width(nInTimer::tInTimer_EXTMUX_CLK_Pulse_Width_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setEXTMUX_CLK_Pulse_Width(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_EXTMUX_CLK_Pulse_Width_t tInTimer::tMode_2_Register::readEXTMUX_CLK_Pulse_Width(nMDBG::tStatus2* s)
{
   return getEXTMUX_CLK_Pulse_Width(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setEXTMUX_CLK_Polarity(nInTimer::tInTimer_Polarity_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffff7f) | ((u32(fieldValue) << 0x7) & ~0xffffff7f);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Polarity_t tInTimer::tMode_2_Register::getEXTMUX_CLK_Polarity(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Polarity_t((_softCopy & ~0xffffff7f) >> 0x7);
}

inline void tInTimer::tMode_2_Register::writeEXTMUX_CLK_Polarity(nInTimer::tInTimer_Polarity_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setEXTMUX_CLK_Polarity(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Polarity_t tInTimer::tMode_2_Register::readEXTMUX_CLK_Polarity(nMDBG::tStatus2* s)
{
   return getEXTMUX_CLK_Polarity(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setSCAN_IN_PROG_Polarity(nInTimer::tInTimer_Polarity_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffdff) | ((u32(fieldValue) << 0x9) & ~0xfffffdff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Polarity_t tInTimer::tMode_2_Register::getSCAN_IN_PROG_Polarity(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Polarity_t((_softCopy & ~0xfffffdff) >> 0x9);
}

inline void tInTimer::tMode_2_Register::writeSCAN_IN_PROG_Polarity(nInTimer::tInTimer_Polarity_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSCAN_IN_PROG_Polarity(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Polarity_t tInTimer::tMode_2_Register::readSCAN_IN_PROG_Polarity(nMDBG::tStatus2* s)
{
   return getSCAN_IN_PROG_Polarity(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setSTART_Output_Select(nInTimer::tInTimer_START_Output_Select_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffbff) | ((u32(fieldValue) << 0xa) & ~0xfffffbff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_START_Output_Select_t tInTimer::tMode_2_Register::getSTART_Output_Select(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_START_Output_Select_t((_softCopy & ~0xfffffbff) >> 0xa);
}

inline void tInTimer::tMode_2_Register::writeSTART_Output_Select(nInTimer::tInTimer_START_Output_Select_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSTART_Output_Select(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_START_Output_Select_t tInTimer::tMode_2_Register::readSTART_Output_Select(nMDBG::tStatus2* s)
{
   return getSTART_Output_Select(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setStart2_Export_Mode(nInTimer::tInTimer_Start2_Export_Mode_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffdffff) | ((u32(fieldValue) << 0x11) & ~0xfffdffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Start2_Export_Mode_t tInTimer::tMode_2_Register::getStart2_Export_Mode(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Start2_Export_Mode_t((_softCopy & ~0xfffdffff) >> 0x11);
}

inline void tInTimer::tMode_2_Register::writeStart2_Export_Mode(nInTimer::tInTimer_Start2_Export_Mode_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setStart2_Export_Mode(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Start2_Export_Mode_t tInTimer::tMode_2_Register::readStart2_Export_Mode(nMDBG::tStatus2* s)
{
   return getStart2_Export_Mode(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setStart1_Export_Mode(nInTimer::tInTimer_Start1_Export_Mode_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffbffff) | ((u32(fieldValue) << 0x12) & ~0xfffbffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Start1_Export_Mode_t tInTimer::tMode_2_Register::getStart1_Export_Mode(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Start1_Export_Mode_t((_softCopy & ~0xfffbffff) >> 0x12);
}

inline void tInTimer::tMode_2_Register::writeStart1_Export_Mode(nInTimer::tInTimer_Start1_Export_Mode_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setStart1_Export_Mode(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Start1_Export_Mode_t tInTimer::tMode_2_Register::readStart1_Export_Mode(nMDBG::tStatus2* s)
{
   return getStart1_Export_Mode(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setStart_Trigger_Length(nInTimer::tInTimer_Start_Trigger_Length_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfff7ffff) | ((u32(fieldValue) << 0x13) & ~0xfff7ffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_Start_Trigger_Length_t tInTimer::tMode_2_Register::getStart_Trigger_Length(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_Start_Trigger_Length_t((_softCopy & ~0xfff7ffff) >> 0x13);
}

inline void tInTimer::tMode_2_Register::writeStart_Trigger_Length(nInTimer::tInTimer_Start_Trigger_Length_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setStart_Trigger_Length(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_Start_Trigger_Length_t tInTimer::tMode_2_Register::readStart_Trigger_Length(nMDBG::tStatus2* s)
{
   return getStart_Trigger_Length(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setSyncMode(nInTimer::tInTimer_SyncMode_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffcfffff) | ((u32(fieldValue) << 0x14) & ~0xffcfffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_SyncMode_t tInTimer::tMode_2_Register::getSyncMode(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_SyncMode_t((_softCopy & ~0xffcfffff) >> 0x14);
}

inline void tInTimer::tMode_2_Register::writeSyncMode(nInTimer::tInTimer_SyncMode_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSyncMode(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_SyncMode_t tInTimer::tMode_2_Register::readSyncMode(nMDBG::tStatus2* s)
{
   return getSyncMode(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setFIFO_Mode(nInTimer::tInTimer_FIFO_Mode_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xff3fffff) | ((u32(fieldValue) << 0x16) & ~0xff3fffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_FIFO_Mode_t tInTimer::tMode_2_Register::getFIFO_Mode(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_FIFO_Mode_t((_softCopy & ~0xff3fffff) >> 0x16);
}

inline void tInTimer::tMode_2_Register::writeFIFO_Mode(nInTimer::tInTimer_FIFO_Mode_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setFIFO_Mode(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_FIFO_Mode_t tInTimer::tMode_2_Register::readFIFO_Mode(nMDBG::tStatus2* s)
{
   return getFIFO_Mode(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setExternal_Gate_Mode(nInTimer::tInTimer_External_Gate_Mode_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfeffffff) | ((u32(fieldValue) << 0x18) & ~0xfeffffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_External_Gate_Mode_t tInTimer::tMode_2_Register::getExternal_Gate_Mode(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_External_Gate_Mode_t((_softCopy & ~0xfeffffff) >> 0x18);
}

inline void tInTimer::tMode_2_Register::writeExternal_Gate_Mode(nInTimer::tInTimer_External_Gate_Mode_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setExternal_Gate_Mode(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_External_Gate_Mode_t tInTimer::tMode_2_Register::readExternal_Gate_Mode(nMDBG::tStatus2* s)
{
   return getExternal_Gate_Mode(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setSI2_Source_Select(nInTimer::tInTimer_SI2_Source_Select_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xf7ffffff) | ((u32(fieldValue) << 0x1b) & ~0xf7ffffff);
   setRegister(newValue, s);
   return *this;
}

inline nInTimer::tInTimer_SI2_Source_Select_t tInTimer::tMode_2_Register::getSI2_Source_Select(nMDBG::tStatus2*) const
{
   return nInTimer::tInTimer_SI2_Source_Select_t((_softCopy & ~0xf7ffffff) >> 0x1b);
}

inline void tInTimer::tMode_2_Register::writeSI2_Source_Select(nInTimer::tInTimer_SI2_Source_Select_t fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI2_Source_Select(fieldValue, s);
   flush(s, force);
}
inline nInTimer::tInTimer_SI2_Source_Select_t tInTimer::tMode_2_Register::readSI2_Source_Select(nMDBG::tStatus2* s)
{
   return getSI2_Source_Select(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setSoftware_Gate(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xdfffffff) | ((u32(fieldValue) << 0x1d) & ~0xdfffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tMode_2_Register::getSoftware_Gate(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xdfffffff) >> 0x1d);
}

inline void tInTimer::tMode_2_Register::writeSoftware_Gate(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSoftware_Gate(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tMode_2_Register::readSoftware_Gate(nMDBG::tStatus2* s)
{
   return getSoftware_Gate(s);
}

inline tInTimer::tMode_2_Register& tInTimer::tMode_2_Register::setHaltOnError(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xbfffffff) | ((u32(fieldValue) << 0x1e) & ~0xbfffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tMode_2_Register::getHaltOnError(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xbfffffff) >> 0x1e);
}

inline void tInTimer::tMode_2_Register::writeHaltOnError(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setHaltOnError(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tMode_2_Register::readHaltOnError(nMDBG::tStatus2* s)
{
   return getHaltOnError(s);
}

inline tInTimer::tSI_Save_Register::tSI_Save_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tSI_Save_Register::tRegisterMap* tInTimer::tSI_Save_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tSI_Save_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tInTimer::tSI_Save_Register& tInTimer::tSI_Save_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   _softCopy = fieldValue;
   return *this;
}

inline u32 tInTimer::tSI_Save_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tSI_Save_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tInTimer::tSI_Save_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tInTimer::tSI_Save_Register& tInTimer::tSI_Save_Register::setSI_Save_Value(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tSI_Save_Register::getSI_Save_Value(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline u32 tInTimer::tSI_Save_Register::readSI_Save_Value(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSI_Save_Value(s);
}

inline tInTimer::tSC_Save_Register::tSC_Save_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tSC_Save_Register::tRegisterMap* tInTimer::tSC_Save_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tSC_Save_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tInTimer::tSC_Save_Register& tInTimer::tSC_Save_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   _softCopy = fieldValue;
   return *this;
}

inline u32 tInTimer::tSC_Save_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tSC_Save_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tInTimer::tSC_Save_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tInTimer::tSC_Save_Register& tInTimer::tSC_Save_Register::setSC_Save_Value(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tSC_Save_Register::getSC_Save_Value(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline u32 tInTimer::tSC_Save_Register::readSC_Save_Value(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSC_Save_Value(s);
}

inline tInTimer::tSI_Load_A_Register::tSI_Load_A_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tSI_Load_A_Register::tRegisterMap* tInTimer::tSI_Load_A_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tSI_Load_A_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tInTimer::tSI_Load_A_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSI_Load_A_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSI_Load_A_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tInTimer::tId)kId, s);
}

inline tInTimer::tSI_Load_A_Register& tInTimer::tSI_Load_A_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tInTimer::tSI_Load_A_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tSI_Load_A_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tInTimer::tSI_Load_A_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline u32 tInTimer::tSI_Load_A_Register::readRegister(nMDBG::tStatus2*)
{
   return _softCopy;
}


inline tInTimer::tSI_Load_A_Register& tInTimer::tSI_Load_A_Register::setSI_Load_A(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tSI_Load_A_Register::getSI_Load_A(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline void tInTimer::tSI_Load_A_Register::writeSI_Load_A(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI_Load_A(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tSI_Load_A_Register::readSI_Load_A(nMDBG::tStatus2* s)
{
   return getSI_Load_A(s);
}

inline tInTimer::tSI2_Save_Register::tSI2_Save_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tSI2_Save_Register::tRegisterMap* tInTimer::tSI2_Save_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tSI2_Save_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tInTimer::tSI2_Save_Register& tInTimer::tSI2_Save_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   _softCopy = fieldValue;
   return *this;
}

inline u32 tInTimer::tSI2_Save_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tSI2_Save_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tInTimer::tSI2_Save_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tInTimer::tSI2_Save_Register& tInTimer::tSI2_Save_Register::setSI2_Save_Value(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tSI2_Save_Register::getSI2_Save_Value(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline u32 tInTimer::tSI2_Save_Register::readSI2_Save_Value(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSI2_Save_Value(s);
}

inline tInTimer::tSI_Load_B_Register::tSI_Load_B_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tSI_Load_B_Register::tRegisterMap* tInTimer::tSI_Load_B_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tSI_Load_B_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tInTimer::tSI_Load_B_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSI_Load_B_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSI_Load_B_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tInTimer::tId)kId, s);
}

inline tInTimer::tSI_Load_B_Register& tInTimer::tSI_Load_B_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tInTimer::tSI_Load_B_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tSI_Load_B_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tInTimer::tSI_Load_B_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline u32 tInTimer::tSI_Load_B_Register::readRegister(nMDBG::tStatus2*)
{
   return _softCopy;
}


inline tInTimer::tSI_Load_B_Register& tInTimer::tSI_Load_B_Register::setSI_Load_B(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tSI_Load_B_Register::getSI_Load_B(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline void tInTimer::tSI_Load_B_Register::writeSI_Load_B(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI_Load_B(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tSI_Load_B_Register::readSI_Load_B(nMDBG::tStatus2* s)
{
   return getSI_Load_B(s);
}

inline tInTimer::tDIV_Save_Register::tDIV_Save_Register()
{
   _softCopy = u16(0x0);
}

inline tInTimer::tDIV_Save_Register::tRegisterMap* tInTimer::tDIV_Save_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tDIV_Save_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tInTimer::tDIV_Save_Register& tInTimer::tDIV_Save_Register::setRegister(u16 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   _softCopy = fieldValue;
   return *this;
}

inline u16 tInTimer::tDIV_Save_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tDIV_Save_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u16 tInTimer::tDIV_Save_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tInTimer::tDIV_Save_Register& tInTimer::tDIV_Save_Register::setDIV_Save_Value(u16 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u16 newValue;   newValue = (_softCopy & 0x0) | ((u16(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u16 tInTimer::tDIV_Save_Register::getDIV_Save_Value(nMDBG::tStatus2*) const
{
   return u16((_softCopy & ~0x0) >> 0x0);
}

inline u16 tInTimer::tDIV_Save_Register::readDIV_Save_Value(nMDBG::tStatus2* s)
{
   refresh(s);
   return getDIV_Save_Value(s);
}

inline tInTimer::tSC_Load_A_Register::tSC_Load_A_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tSC_Load_A_Register::tRegisterMap* tInTimer::tSC_Load_A_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tSC_Load_A_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tInTimer::tSC_Load_A_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSC_Load_A_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSC_Load_A_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tInTimer::tId)kId, s);
}

inline tInTimer::tSC_Load_A_Register& tInTimer::tSC_Load_A_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tInTimer::tSC_Load_A_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tSC_Load_A_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tInTimer::tSC_Load_A_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline u32 tInTimer::tSC_Load_A_Register::readRegister(nMDBG::tStatus2*)
{
   return _softCopy;
}


inline tInTimer::tSC_Load_A_Register& tInTimer::tSC_Load_A_Register::setSC_Load_A(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tSC_Load_A_Register::getSC_Load_A(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline void tInTimer::tSC_Load_A_Register::writeSC_Load_A(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSC_Load_A(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tSC_Load_A_Register::readSC_Load_A(nMDBG::tStatus2* s)
{
   return getSC_Load_A(s);
}

inline tInTimer::tSC_Load_B_Register::tSC_Load_B_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tSC_Load_B_Register::tRegisterMap* tInTimer::tSC_Load_B_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tSC_Load_B_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tInTimer::tSC_Load_B_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSC_Load_B_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSC_Load_B_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tInTimer::tId)kId, s);
}

inline tInTimer::tSC_Load_B_Register& tInTimer::tSC_Load_B_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tInTimer::tSC_Load_B_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tSC_Load_B_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tInTimer::tSC_Load_B_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline u32 tInTimer::tSC_Load_B_Register::readRegister(nMDBG::tStatus2*)
{
   return _softCopy;
}


inline tInTimer::tSC_Load_B_Register& tInTimer::tSC_Load_B_Register::setSC_Load_B(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tSC_Load_B_Register::getSC_Load_B(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline void tInTimer::tSC_Load_B_Register::writeSC_Load_B(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSC_Load_B(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tSC_Load_B_Register::readSC_Load_B(nMDBG::tStatus2* s)
{
   return getSC_Load_B(s);
}

inline tInTimer::tSC_PreWaitCntRegister::tSC_PreWaitCntRegister()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tSC_PreWaitCntRegister::tRegisterMap* tInTimer::tSC_PreWaitCntRegister::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tSC_PreWaitCntRegister::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tInTimer::tSC_PreWaitCntRegister& tInTimer::tSC_PreWaitCntRegister::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   _softCopy = fieldValue;
   return *this;
}

inline u32 tInTimer::tSC_PreWaitCntRegister::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tSC_PreWaitCntRegister::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tInTimer::tSC_PreWaitCntRegister::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tInTimer::tSC_PreWaitCntRegister& tInTimer::tSC_PreWaitCntRegister::setSC_PreWaitCount(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tSC_PreWaitCntRegister::getSC_PreWaitCount(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline u32 tInTimer::tSC_PreWaitCntRegister::readSC_PreWaitCount(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSC_PreWaitCount(s);
}

inline tInTimer::tSI2_Load_A_Register::tSI2_Load_A_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tSI2_Load_A_Register::tRegisterMap* tInTimer::tSI2_Load_A_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tSI2_Load_A_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tInTimer::tSI2_Load_A_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSI2_Load_A_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSI2_Load_A_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tInTimer::tId)kId, s);
}

inline tInTimer::tSI2_Load_A_Register& tInTimer::tSI2_Load_A_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tInTimer::tSI2_Load_A_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tSI2_Load_A_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tInTimer::tSI2_Load_A_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline u32 tInTimer::tSI2_Load_A_Register::readRegister(nMDBG::tStatus2*)
{
   return _softCopy;
}


inline tInTimer::tSI2_Load_A_Register& tInTimer::tSI2_Load_A_Register::setSI2_Load_A(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tSI2_Load_A_Register::getSI2_Load_A(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline void tInTimer::tSI2_Load_A_Register::writeSI2_Load_A(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI2_Load_A(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tSI2_Load_A_Register::readSI2_Load_A(nMDBG::tStatus2* s)
{
   return getSI2_Load_A(s);
}

inline tInTimer::tSI2_Load_B_Register::tSI2_Load_B_Register()
{
   _softCopy = u32(0x0);
}

inline tInTimer::tSI2_Load_B_Register::tRegisterMap* tInTimer::tSI2_Load_B_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tSI2_Load_B_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tInTimer::tSI2_Load_B_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSI2_Load_B_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tSI2_Load_B_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tInTimer::tId)kId, s);
}

inline tInTimer::tSI2_Load_B_Register& tInTimer::tSI2_Load_B_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tInTimer::tSI2_Load_B_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tSI2_Load_B_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tInTimer::tSI2_Load_B_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline u32 tInTimer::tSI2_Load_B_Register::readRegister(nMDBG::tStatus2*)
{
   return _softCopy;
}


inline tInTimer::tSI2_Load_B_Register& tInTimer::tSI2_Load_B_Register::setSI2_Load_B(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tInTimer::tSI2_Load_B_Register::getSI2_Load_B(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline void tInTimer::tSI2_Load_B_Register::writeSI2_Load_B(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSI2_Load_B(fieldValue, s);
   flush(s, force);
}
inline u32 tInTimer::tSI2_Load_B_Register::readSI2_Load_B(nMDBG::tStatus2* s)
{
   return getSI2_Load_B(s);
}

inline tInTimer::tDIV_Load_A_Register::tDIV_Load_A_Register()
{
   _softCopy = u16(0x0);
}

inline tInTimer::tDIV_Load_A_Register::tRegisterMap* tInTimer::tDIV_Load_A_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tDIV_Load_A_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tInTimer::tDIV_Load_A_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tDIV_Load_A_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tInTimer::tId)kId, s);
}

inline void tInTimer::tDIV_Load_A_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tInTimer::tId)kId, s);
}

inline tInTimer::tDIV_Load_A_Register& tInTimer::tDIV_Load_A_Register::setRegister(u16 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u16 tInTimer::tDIV_Load_A_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tInTimer::tDIV_Load_A_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u16(0xffff);
      _softCopy |= u16(0x0);
      markClean(s);
   }
}

inline void tInTimer::tDIV_Load_A_Register::writeRegister(u16 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline u16 tInTimer::tDIV_Load_A_Register::readRegister(nMDBG::tStatus2*)
{
   return _softCopy;
}


inline tInTimer::tDIV_Load_A_Register& tInTimer::tDIV_Load_A_Register::setDIV_Load_A(u16 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u16 newValue;   newValue = (_softCopy & 0x0) | ((u16(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u16 tInTimer::tDIV_Load_A_Register::getDIV_Load_A(nMDBG::tStatus2*) const
{
   return u16((_softCopy & ~0x0) >> 0x0);
}

inline void tInTimer::tDIV_Load_A_Register::writeDIV_Load_A(u16 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setDIV_Load_A(fieldValue, s);
   flush(s, force);
}
inline u16 tInTimer::tDIV_Load_A_Register::readDIV_Load_A(nMDBG::tStatus2* s)
{
   return getDIV_Load_A(s);
}

inline tInTimer::tInterrupt1_Register::tInterrupt1_Register()
{
}

inline tInTimer::tInterrupt1_Register::tRegisterMap* tInTimer::tInterrupt1_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tInterrupt1_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tInTimer::tInterrupt1_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline void tInTimer::tInterrupt1_Register::writeSC_TC_Interrupt_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0xfffffffe,s);
}
inline void tInTimer::tInterrupt1_Register::writeSTART1_Interrupt_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1) & ~0xfffffffd,s);
}
inline void tInTimer::tInterrupt1_Register::writeSTART2_Interrupt_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x2) & ~0xfffffffb,s);
}
inline void tInTimer::tInterrupt1_Register::writeSTART_Interrupt_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x3) & ~0xfffffff7,s);
}
inline void tInTimer::tInterrupt1_Register::writeSTOP_Interrupt_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x4) & ~0xffffffef,s);
}
inline void tInTimer::tInterrupt1_Register::writeOverrun_Interrupt_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x5) & ~0xffffffdf,s);
}
inline void tInTimer::tInterrupt1_Register::writeOverflow_Interrupt_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x6) & ~0xffffffbf,s);
}
inline void tInTimer::tInterrupt1_Register::writeFIFO_Interrupt_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x7) & ~0xffffff7f,s);
}
inline void tInTimer::tInterrupt1_Register::writeScanOverrun_Interrupt_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x8) & ~0xfffffeff,s);
}
inline void tInTimer::tInterrupt1_Register::writeSC_PreWaitCountTC_Interrupt_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x9) & ~0xfffffdff,s);
}
inline void tInTimer::tInterrupt1_Register::writeScanOverrun_Interrupt_Ack(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x16) & ~0xffbfffff,s);
}
inline void tInTimer::tInterrupt1_Register::writeSC_TC_Error_Confirm(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x17) & ~0xff7fffff,s);
}
inline void tInTimer::tInterrupt1_Register::writeSC_TC_Interrupt_Ack(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x18) & ~0xfeffffff,s);
}
inline void tInTimer::tInterrupt1_Register::writeSTART1_Interrupt_Ack(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x19) & ~0xfdffffff,s);
}
inline void tInTimer::tInterrupt1_Register::writeSTART2_Interrupt_Ack(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1a) & ~0xfbffffff,s);
}
inline void tInTimer::tInterrupt1_Register::writeSTART_Interrupt_Ack(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1b) & ~0xf7ffffff,s);
}
inline void tInTimer::tInterrupt1_Register::writeSTOP_Interrupt_Ack(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1c) & ~0xefffffff,s);
}
inline void tInTimer::tInterrupt1_Register::writeOverrun_Interrupt_Ack(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1d) & ~0xdfffffff,s);
}
inline void tInTimer::tInterrupt1_Register::writeSC_PreWaitCountTC_Interrupt_Ack(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1e) & ~0xbfffffff,s);
}
inline void tInTimer::tInterrupt1_Register::writeOverflow_Interrupt_Ack(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1f) & ~0x7fffffff,s);
}
inline tInTimer::tInterrupt2_Register::tInterrupt2_Register()
{
}

inline tInTimer::tInterrupt2_Register::tRegisterMap* tInTimer::tInterrupt2_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tInterrupt2_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tInTimer::tInterrupt2_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline void tInTimer::tInterrupt2_Register::writeSC_TC_Interrupt_Disable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0xfffffffe,s);
}
inline void tInTimer::tInterrupt2_Register::writeSTART1_Interrupt_Disable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1) & ~0xfffffffd,s);
}
inline void tInTimer::tInterrupt2_Register::writeSTART2_Interrupt_Disable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x2) & ~0xfffffffb,s);
}
inline void tInTimer::tInterrupt2_Register::writeSTART_Interrupt_Disable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x3) & ~0xfffffff7,s);
}
inline void tInTimer::tInterrupt2_Register::writeSTOP_Interrupt_Disable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x4) & ~0xffffffef,s);
}
inline void tInTimer::tInterrupt2_Register::writeOverrun_Interrupt_Disable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x5) & ~0xffffffdf,s);
}
inline void tInTimer::tInterrupt2_Register::writeOverflow_Interrupt_Disable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x6) & ~0xffffffbf,s);
}
inline void tInTimer::tInterrupt2_Register::writeFIFO_Interrupt_Disable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x7) & ~0xffffff7f,s);
}
inline void tInTimer::tInterrupt2_Register::writeScanOverrun_Interrupt_Disable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x8) & ~0xfffffeff,s);
}
inline void tInTimer::tInterrupt2_Register::writeSC_PreWaitCountTC_Interrupt_Disable(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x9) & ~0xfffffdff,s);
}
inline void tInTimer::tInterrupt2_Register::writeScanOverrun_Interrupt_Ack2(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x16) & ~0xffbfffff,s);
}
inline void tInTimer::tInterrupt2_Register::writeSC_TC_Error_Confirm2(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x17) & ~0xff7fffff,s);
}
inline void tInTimer::tInterrupt2_Register::writeSC_TC_Interrupt_Ack2(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x18) & ~0xfeffffff,s);
}
inline void tInTimer::tInterrupt2_Register::writeSTART1_Interrupt_Ack2(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x19) & ~0xfdffffff,s);
}
inline void tInTimer::tInterrupt2_Register::writeSTART2_Interrupt_Ack2(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1a) & ~0xfbffffff,s);
}
inline void tInTimer::tInterrupt2_Register::writeSTART_Interrupt_Ack2(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1b) & ~0xf7ffffff,s);
}
inline void tInTimer::tInterrupt2_Register::writeSTOP_Interrupt_Ack2(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1c) & ~0xefffffff,s);
}
inline void tInTimer::tInterrupt2_Register::writeOverrun_Interrupt_Ack2(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1d) & ~0xdfffffff,s);
}
inline void tInTimer::tInterrupt2_Register::writeSC_PreWaitCountTC_Interrupt_Ack2(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1e) & ~0xbfffffff,s);
}
inline void tInTimer::tInterrupt2_Register::writeOverflow_Interrupt_Ack2(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x1f) & ~0x7fffffff,s);
}
inline tInTimer::tReset_Register::tReset_Register()
{
}

inline tInTimer::tReset_Register::tRegisterMap* tInTimer::tReset_Register::registerMap(void)
{
   return _regMap;
}

inline void tInTimer::tReset_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tInTimer::tReset_Register::writeRegister(u16 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline void tInTimer::tReset_Register::writeReset(u16 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u16(fieldValue) << 0x0) & ~0xfffe,s);
}
inline void tInTimer::tReset_Register::writeConfiguration_Start(u16 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u16(fieldValue) << 0x1) & ~0xfffd,s);
}
inline void tInTimer::tReset_Register::writeConfiguration_End(u16 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u16(fieldValue) << 0x2) & ~0xfffb,s);
}
inline void tInTimer::tReset_Register::writeConfiguration_Memory_Clear(u16 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u16(fieldValue) << 0x3) & ~0xfff7,s);
}
inline void tInTimer::tReset_Register::writeFIFO_Clear(u16 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u16(fieldValue) << 0x4) & ~0xffef,s);
}
#endif


// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!
// This file is autogenerated!!!
// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!