// Copyright 2011 National Instruments
// License: NATIONAL INSTRUMENTS SOFTWARE LICENSE AGREEMENT
//   Refer to "MHDDK License Agreement.pdf" in the root of this distribution.

// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!
// This file is autogenerated!!!
// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!

#ifndef ___tCHInCh_ipp___
#define ___tCHInCh_ipp___

#ifndef ___tCHInCh_h___
#include "tCHInCh.h"
#endif

#ifndef ___nNIMXRegistermap_tStatus2Ptr_ipp___
#define ___nNIMXRegistermap_tStatus2Ptr_ipp___

typedef nMDBG::tStatus2 nNIMXRegisterMap120_tStatus2;


namespace nNIMXRegisterMap120 {
namespace {

typedef nNIMXRegisterMap120_tStatus2 tStatus2;

inline void setStatus(tStatus2* s, tStatus newStatus)
{
   if (s) s->setCode(newStatus);
}

inline tStatus* toPALStatusPtr(tStatus2* s)
{
   return s ? s->operator tStatus*() : ((tStatus*)NULL);
}

inline tBoolean statusIsFatal(tStatus2* s)
{
   return s && s->isFatal();
}

} // unnamed namespace
} // namespace nNIMXRegisterMap120

#endif // ___nNIMXRegistermap_tStatus2Ptr_ipp___


inline void tCHInCh::tReg32IODirect32::write(
   tBusSpaceReference addrSpace,
   u32 offset,
   u32 value,
   nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   addrSpace.write32(offset, value);
}

inline u32 tCHInCh::tReg32IODirect32::read(
   tBusSpaceReference addrSpace,
   u32 offset,
   nMDBG::tStatus2* s)
{
   u32 value = (u32)~0;
   if (s && s->isFatal()) return value;
   value = addrSpace.read32(offset);
   return value;
}

inline tBusSpaceReference tCHInCh::getBusSpaceReference(void) const
{
   return _addrSpace;
}

inline void tCHInCh::setAddressOffset(u32 value, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   _addressOffset = value;
}
inline u32 tCHInCh::getAddressOffset(nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return 0UL;
   return _addressOffset;
}
inline tBoolean tCHInCh::isDirty(tId id, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return kFalse;
   u32 regId = id&0x01FFFFFF;
   if (regId > kMaxRegisterId) {
      nNIMXRegisterMap120::setStatus(s, kStatusBadSelector);
      return kFalse;
   }

   return _dirtyVector[regId];
}

inline void tCHInCh::markDirty(tId id, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   u32 regId = id&0x01FFFFFF;

   if (regId > kMaxRegisterId) {
      nNIMXRegisterMap120::setStatus(s, kStatusBadSelector);
      return;
   }

   _dirtyVector[regId] = 1;
}

inline void tCHInCh::markClean(tId id, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   u32 regId = id&0x01FFFFFF;

   if (regId > kMaxRegisterId) {
      nNIMXRegisterMap120::setStatus(s, kStatusBadSelector);
      return;
   }

   _dirtyVector[regId] = 0;
}

inline void tCHInCh::markDirty(nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   unsigned int i;
   for (i = 0; i < sizeof(_dirtyVector)/sizeof(_dirtyVector[0]); i++) {
      _dirtyVector[i] = 1;
   }
}

inline void tCHInCh::markClean(nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   for (unsigned int i = 0; i < sizeof(_dirtyVector)/sizeof(_dirtyVector[0]); i++) {
      _dirtyVector[i] = 0;
   }
}

inline tCHInCh::tCHInCh_Identification_Register::tCHInCh_Identification_Register()
{
   _softCopy = u32(0x0);
}

inline tCHInCh::tCHInCh_Identification_Register::tRegisterMap* tCHInCh::tCHInCh_Identification_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tCHInCh_Identification_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tCHInCh::tCHInCh_Identification_Register& tCHInCh::tCHInCh_Identification_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   _softCopy = fieldValue;
   return *this;
}

inline u32 tCHInCh::tCHInCh_Identification_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tCHInCh::tCHInCh_Identification_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tCHInCh::tCHInCh_Identification_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tCHInCh::tCHInCh_Identification_Register& tCHInCh::tCHInCh_Identification_Register::setID(nCHInCh::tCHInCh_Signature_t fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline nCHInCh::tCHInCh_Signature_t tCHInCh::tCHInCh_Identification_Register::getID(nMDBG::tStatus2*) const
{
   return nCHInCh::tCHInCh_Signature_t((_softCopy & ~0x0) >> 0x0);
}

inline nCHInCh::tCHInCh_Signature_t tCHInCh::tCHInCh_Identification_Register::readID(nMDBG::tStatus2* s)
{
   refresh(s);
   return getID(s);
}

inline tCHInCh::tIO_Port_Resource_Description_Register::tIO_Port_Resource_Description_Register()
{
   _softCopy = u32(0x0);
}

inline tCHInCh::tIO_Port_Resource_Description_Register::tRegisterMap* tCHInCh::tIO_Port_Resource_Description_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tIO_Port_Resource_Description_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tCHInCh::tIO_Port_Resource_Description_Register& tCHInCh::tIO_Port_Resource_Description_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   _softCopy = fieldValue;
   return *this;
}

inline u32 tCHInCh::tIO_Port_Resource_Description_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tCHInCh::tIO_Port_Resource_Description_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tCHInCh::tIO_Port_Resource_Description_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tCHInCh::tIO_Port_Resource_Description_Register& tCHInCh::tIO_Port_Resource_Description_Register::setIOMPS(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfff0ffff) | ((u32(fieldValue) << 0x10) & ~0xfff0ffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tIO_Port_Resource_Description_Register::getIOMPS(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfff0ffff) >> 0x10);
}

inline u32 tCHInCh::tIO_Port_Resource_Description_Register::readIOMPS(nMDBG::tStatus2* s)
{
   refresh(s);
   return getIOMPS(s);
}

inline tCHInCh::tInterrupt_Mask_Register::tInterrupt_Mask_Register()
{
   _softCopy = u32(0x0);
}

inline tCHInCh::tInterrupt_Mask_Register::tRegisterMap* tCHInCh::tInterrupt_Mask_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tInterrupt_Mask_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tCHInCh::tInterrupt_Mask_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tCHInCh::tId)kId, s);
}

inline void tCHInCh::tInterrupt_Mask_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tCHInCh::tId)kId, s);
}

inline void tCHInCh::tInterrupt_Mask_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tCHInCh::tId)kId, s);
}

inline tCHInCh::tInterrupt_Mask_Register& tCHInCh::tInterrupt_Mask_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tCHInCh::tInterrupt_Mask_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tCHInCh::tInterrupt_Mask_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tCHInCh::tInterrupt_Mask_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline void tCHInCh::tInterrupt_Mask_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tCHInCh::tInterrupt_Mask_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tCHInCh::tInterrupt_Mask_Register& tCHInCh::tInterrupt_Mask_Register::setClear_SMIO_FIFO_Int(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffeff) | ((u32(fieldValue) << 0x8) & ~0xfffffeff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tInterrupt_Mask_Register::getClear_SMIO_FIFO_Int(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfffffeff) >> 0x8);
}

inline void tCHInCh::tInterrupt_Mask_Register::writeClear_SMIO_FIFO_Int(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setClear_SMIO_FIFO_Int(fieldValue, s);
   flush(s, force);
}
inline u32 tCHInCh::tInterrupt_Mask_Register::readClear_SMIO_FIFO_Int(nMDBG::tStatus2* s)
{
   refresh(s);
   return getClear_SMIO_FIFO_Int(s);
}

inline tCHInCh::tInterrupt_Mask_Register& tCHInCh::tInterrupt_Mask_Register::setSet_SMIO_FIFO_Int(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffdff) | ((u32(fieldValue) << 0x9) & ~0xfffffdff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tInterrupt_Mask_Register::getSet_SMIO_FIFO_Int(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfffffdff) >> 0x9);
}

inline void tCHInCh::tInterrupt_Mask_Register::writeSet_SMIO_FIFO_Int(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSet_SMIO_FIFO_Int(fieldValue, s);
   flush(s, force);
}
inline u32 tCHInCh::tInterrupt_Mask_Register::readSet_SMIO_FIFO_Int(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSet_SMIO_FIFO_Int(s);
}

inline tCHInCh::tInterrupt_Mask_Register& tCHInCh::tInterrupt_Mask_Register::setClear_STC3_Int(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffffbff) | ((u32(fieldValue) << 0xa) & ~0xfffffbff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tInterrupt_Mask_Register::getClear_STC3_Int(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfffffbff) >> 0xa);
}

inline void tCHInCh::tInterrupt_Mask_Register::writeClear_STC3_Int(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setClear_STC3_Int(fieldValue, s);
   flush(s, force);
}
inline u32 tCHInCh::tInterrupt_Mask_Register::readClear_STC3_Int(nMDBG::tStatus2* s)
{
   refresh(s);
   return getClear_STC3_Int(s);
}

inline tCHInCh::tInterrupt_Mask_Register& tCHInCh::tInterrupt_Mask_Register::setSet_STC3_Int(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xfffff7ff) | ((u32(fieldValue) << 0xb) & ~0xfffff7ff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tInterrupt_Mask_Register::getSet_STC3_Int(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xfffff7ff) >> 0xb);
}

inline void tCHInCh::tInterrupt_Mask_Register::writeSet_STC3_Int(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSet_STC3_Int(fieldValue, s);
   flush(s, force);
}
inline u32 tCHInCh::tInterrupt_Mask_Register::readSet_STC3_Int(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSet_STC3_Int(s);
}

inline tCHInCh::tInterrupt_Mask_Register& tCHInCh::tInterrupt_Mask_Register::setClear_CPU_Int(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xbfffffff) | ((u32(fieldValue) << 0x1e) & ~0xbfffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tInterrupt_Mask_Register::getClear_CPU_Int(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xbfffffff) >> 0x1e);
}

inline void tCHInCh::tInterrupt_Mask_Register::writeClear_CPU_Int(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setClear_CPU_Int(fieldValue, s);
   flush(s, force);
}
inline u32 tCHInCh::tInterrupt_Mask_Register::readClear_CPU_Int(nMDBG::tStatus2* s)
{
   refresh(s);
   return getClear_CPU_Int(s);
}

inline tCHInCh::tInterrupt_Mask_Register& tCHInCh::tInterrupt_Mask_Register::setSet_CPU_Int(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x7fffffff) | ((u32(fieldValue) << 0x1f) & ~0x7fffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tInterrupt_Mask_Register::getSet_CPU_Int(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x7fffffff) >> 0x1f);
}

inline void tCHInCh::tInterrupt_Mask_Register::writeSet_CPU_Int(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSet_CPU_Int(fieldValue, s);
   flush(s, force);
}
inline u32 tCHInCh::tInterrupt_Mask_Register::readSet_CPU_Int(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSet_CPU_Int(s);
}

inline tCHInCh::tInterrupt_Status_Register::tInterrupt_Status_Register()
{
}

inline tCHInCh::tInterrupt_Status_Register::tRegisterMap* tCHInCh::tInterrupt_Status_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tInterrupt_Status_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline u32 tCHInCh::tInterrupt_Status_Register::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline u32 tCHInCh::tInterrupt_Status_Register::readSMIO_FIFO_Int(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0xfffffdff) >> 0x9);
}

inline u32 tCHInCh::tInterrupt_Status_Register::readSTC3_Int(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0xfffff7ff) >> 0xb);
}

inline u32 tCHInCh::tInterrupt_Status_Register::readDMA(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0xefffffff) >> 0x1c);
}

inline u32 tCHInCh::tInterrupt_Status_Register::readExternal(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0xdfffffff) >> 0x1d);
}

inline u32 tCHInCh::tInterrupt_Status_Register::readAdditional_Int(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0xbfffffff) >> 0x1e);
}

inline u32 tCHInCh::tInterrupt_Status_Register::readInt(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0x7fffffff) >> 0x1f);
}

inline tCHInCh::tVolatile_Interrupt_Status_Register::tVolatile_Interrupt_Status_Register()
{
}

inline tCHInCh::tVolatile_Interrupt_Status_Register::tRegisterMap* tCHInCh::tVolatile_Interrupt_Status_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tVolatile_Interrupt_Status_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline u32 tCHInCh::tVolatile_Interrupt_Status_Register::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline u32 tCHInCh::tVolatile_Interrupt_Status_Register::readVol_SMIO_FIFO_Int(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0xfffffdff) >> 0x9);
}

inline u32 tCHInCh::tVolatile_Interrupt_Status_Register::readVol_STC3_Int(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0xfffff7ff) >> 0xb);
}

inline u32 tCHInCh::tVolatile_Interrupt_Status_Register::readVol_DMA(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0xefffffff) >> 0x1c);
}

inline u32 tCHInCh::tVolatile_Interrupt_Status_Register::readVol_External(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0xdfffffff) >> 0x1d);
}

inline u32 tCHInCh::tVolatile_Interrupt_Status_Register::readVol_Additional_Int(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0xbfffffff) >> 0x1e);
}

inline u32 tCHInCh::tVolatile_Interrupt_Status_Register::readVol_Int(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0x7fffffff) >> 0x1f);
}

inline tCHInCh::tHost_Bus_Resource_Control_Register::tHost_Bus_Resource_Control_Register()
{
   _softCopy = u32(0x0);
}

inline tCHInCh::tHost_Bus_Resource_Control_Register::tRegisterMap* tCHInCh::tHost_Bus_Resource_Control_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tHost_Bus_Resource_Control_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tCHInCh::tHost_Bus_Resource_Control_Register::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tCHInCh::tId)kId, s);
}

inline void tCHInCh::tHost_Bus_Resource_Control_Register::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tCHInCh::tId)kId, s);
}

inline void tCHInCh::tHost_Bus_Resource_Control_Register::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tCHInCh::tId)kId, s);
}

inline tCHInCh::tHost_Bus_Resource_Control_Register& tCHInCh::tHost_Bus_Resource_Control_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tCHInCh::tHost_Bus_Resource_Control_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tCHInCh::tHost_Bus_Resource_Control_Register::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tCHInCh::tHost_Bus_Resource_Control_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline void tCHInCh::tHost_Bus_Resource_Control_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tCHInCh::tHost_Bus_Resource_Control_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tCHInCh::tHost_Bus_Resource_Control_Register& tCHInCh::tHost_Bus_Resource_Control_Register::setDMA_MA64(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffffbfff) | ((u32(fieldValue) << 0xe) & ~0xffffbfff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tHost_Bus_Resource_Control_Register::getDMA_MA64(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffffbfff) >> 0xe);
}

inline void tCHInCh::tHost_Bus_Resource_Control_Register::writeDMA_MA64(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setDMA_MA64(fieldValue, s);
   flush(s, force);
}
inline u32 tCHInCh::tHost_Bus_Resource_Control_Register::readDMA_MA64(nMDBG::tStatus2* s)
{
   refresh(s);
   return getDMA_MA64(s);
}

inline tCHInCh::tHost_Bus_Resource_Control_Register& tCHInCh::tHost_Bus_Resource_Control_Register::setDMA_LA64(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffff7fff) | ((u32(fieldValue) << 0xf) & ~0xffff7fff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tHost_Bus_Resource_Control_Register::getDMA_LA64(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffff7fff) >> 0xf);
}

inline void tCHInCh::tHost_Bus_Resource_Control_Register::writeDMA_LA64(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setDMA_LA64(fieldValue, s);
   flush(s, force);
}
inline u32 tCHInCh::tHost_Bus_Resource_Control_Register::readDMA_LA64(nMDBG::tStatus2* s)
{
   refresh(s);
   return getDMA_LA64(s);
}

inline tCHInCh::tHost_Bus_Resource_Control_Register& tCHInCh::tHost_Bus_Resource_Control_Register::setIO_Master_Enable(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x7fffffff) | ((u32(fieldValue) << 0x1f) & ~0x7fffffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tHost_Bus_Resource_Control_Register::getIO_Master_Enable(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x7fffffff) >> 0x1f);
}

inline void tCHInCh::tHost_Bus_Resource_Control_Register::writeIO_Master_Enable(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setIO_Master_Enable(fieldValue, s);
   flush(s, force);
}
inline u32 tCHInCh::tHost_Bus_Resource_Control_Register::readIO_Master_Enable(nMDBG::tStatus2* s)
{
   refresh(s);
   return getIO_Master_Enable(s);
}

inline tCHInCh::tEEPROM_Window_Register::tEEPROM_Window_Register()
{
}

inline tCHInCh::tEEPROM_Window_Register::tRegisterMap* tCHInCh::tEEPROM_Window_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tEEPROM_Window_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tEEPROM_Window_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tEEPROM_Window_Register::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tEEPROM_Window_Register::writeEEPROM_Window_Field(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline u32 tCHInCh::tEEPROM_Window_Register::readEEPROM_Window_Field(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0x0) >> 0x0);
}

inline tCHInCh::tSimultaneous_Window_Register::tSimultaneous_Window_Register()
{
}

inline tCHInCh::tSimultaneous_Window_Register::tRegisterMap* tCHInCh::tSimultaneous_Window_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tSimultaneous_Window_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tSimultaneous_Window_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tSimultaneous_Window_Register::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tSimultaneous_Window_Register::writeSimultaneous_Window_Field(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline u32 tCHInCh::tSimultaneous_Window_Register::readSimultaneous_Window_Field(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0x0) >> 0x0);
}

inline tCHInCh::tWindow_Control_Register::tWindow_Control_Register()
{
}

inline tCHInCh::tWindow_Control_Register::tRegisterMap* tCHInCh::tWindow_Control_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tWindow_Control_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tWindow_Control_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tWindow_Control_Register::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tWindow_Control_Register::writeWindow_Control_Field(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline u32 tCHInCh::tWindow_Control_Register::readWindow_Control_Field(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0x0) >> 0x0);
}

inline tCHInCh::tScrap_Register_t::tScrap_Register_t(u32 offset, u32 id)
 : kOffset(offset),
   kId(id)
{
   _softCopy = u32(0x0);
}

inline tCHInCh::tScrap_Register_t::tScrap_Register_t()
 : kOffset((u32)~0),
   kId((u32)~0)
{
   _softCopy = u32(0x0);
}

inline void tCHInCh::tScrap_Register_t::initialize(u32 offset, u32 id)
{
   u32* mutableOffset = const_cast<u32*>(&this->kOffset);
   u32* mutableId     = const_cast<u32*>(&this->kId);
   *mutableOffset = offset;
   *mutableId = id;
}

inline tCHInCh::tScrap_Register_t::tRegisterMap* tCHInCh::tScrap_Register_t::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tScrap_Register_t::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tBoolean tCHInCh::tScrap_Register_t::isDirty(nMDBG::tStatus2* s)
{
   return _regMap->isDirty((tCHInCh::tId)kId, s);
}

inline void tCHInCh::tScrap_Register_t::markDirty(nMDBG::tStatus2* s)
{
   _regMap->markDirty((tCHInCh::tId)kId, s);
}

inline void tCHInCh::tScrap_Register_t::markClean(nMDBG::tStatus2* s)
{
   _regMap->markClean((tCHInCh::tId)kId, s);
}

inline tCHInCh::tScrap_Register_t& tCHInCh::tScrap_Register_t::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   if (_softCopy != fieldValue) {
      _softCopy = fieldValue;
      markDirty(s);
   }
   return *this;
}

inline u32 tCHInCh::tScrap_Register_t::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tCHInCh::tScrap_Register_t::flush(nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   if (force || isDirty(s)) {
      tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), _softCopy, s);
      _softCopy &= u32(0xffffffff);
      _softCopy |= u32(0x0);
      markClean(s);
   }
}

inline void tCHInCh::tScrap_Register_t::writeRegister(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   if (s && s->isFatal()) return;
   force = force || (_softCopy != fieldValue);
   _softCopy = fieldValue;
   flush(s, force);
}

inline void tCHInCh::tScrap_Register_t::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tCHInCh::tScrap_Register_t::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tCHInCh::tScrap_Register_t& tCHInCh::tScrap_Register_t::setSDATA(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0x0) | ((u32(fieldValue) << 0x0) & ~0x0);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tScrap_Register_t::getSDATA(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0x0) >> 0x0);
}

inline void tCHInCh::tScrap_Register_t::writeSDATA(u32 fieldValue, nMDBG::tStatus2* s, tBoolean force)
{
   setSDATA(fieldValue, s);
   flush(s, force);
}
inline u32 tCHInCh::tScrap_Register_t::readSDATA(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSDATA(s);
}

inline tCHInCh::tConfiguration_Register::tConfiguration_Register()
{
}

inline tCHInCh::tConfiguration_Register::tRegisterMap* tCHInCh::tConfiguration_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tConfiguration_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tConfiguration_Register::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tConfiguration_Register::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tConfiguration_Register::writeConfiguration_Value(u32 fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline u32 tCHInCh::tConfiguration_Register::readConfiguration_Value(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return u32((value & ~0x0) >> 0x0);
}

inline tCHInCh::tEEPROM_Register_0::tEEPROM_Register_0()
{
}

inline tCHInCh::tEEPROM_Register_0::tRegisterMap* tCHInCh::tEEPROM_Register_0::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tEEPROM_Register_0::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tEEPROM_Register_0::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tEEPROM_Register_0::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tEEPROM_Register_0::writeEEPROM_Register_0_Value(nCHInCh::tEEPROM_Register_0_Value_t fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline nCHInCh::tEEPROM_Register_0_Value_t tCHInCh::tEEPROM_Register_0::readEEPROM_Register_0_Value(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return nCHInCh::tEEPROM_Register_0_Value_t((value & ~0x0) >> 0x0);
}

inline tCHInCh::tEEPROM_Register_1::tEEPROM_Register_1()
{
}

inline tCHInCh::tEEPROM_Register_1::tRegisterMap* tCHInCh::tEEPROM_Register_1::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tEEPROM_Register_1::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tEEPROM_Register_1::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tEEPROM_Register_1::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tEEPROM_Register_1::writeEEPROM_Register_1_Value(nCHInCh::tEEPROM_Register_1_Value_t fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline nCHInCh::tEEPROM_Register_1_Value_t tCHInCh::tEEPROM_Register_1::readEEPROM_Register_1_Value(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return nCHInCh::tEEPROM_Register_1_Value_t((value & ~0x0) >> 0x0);
}

inline tCHInCh::tEEPROM_Register_2::tEEPROM_Register_2()
{
}

inline tCHInCh::tEEPROM_Register_2::tRegisterMap* tCHInCh::tEEPROM_Register_2::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tEEPROM_Register_2::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tEEPROM_Register_2::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tEEPROM_Register_2::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tEEPROM_Register_2::writeEEPROM_Register_2_Value(nCHInCh::tEEPROM_Register_2_Value_t fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline nCHInCh::tEEPROM_Register_2_Value_t tCHInCh::tEEPROM_Register_2::readEEPROM_Register_2_Value(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return nCHInCh::tEEPROM_Register_2_Value_t((value & ~0x0) >> 0x0);
}

inline tCHInCh::tSMIO_Register_0::tSMIO_Register_0()
{
}

inline tCHInCh::tSMIO_Register_0::tRegisterMap* tCHInCh::tSMIO_Register_0::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tSMIO_Register_0::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tSMIO_Register_0::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tSMIO_Register_0::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tSMIO_Register_0::writeSMIO_Register_0_Value(nCHInCh::tSMIO_Register_0_Value_t fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline nCHInCh::tSMIO_Register_0_Value_t tCHInCh::tSMIO_Register_0::readSMIO_Register_0_Value(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return nCHInCh::tSMIO_Register_0_Value_t((value & ~0x0) >> 0x0);
}

inline tCHInCh::tSMIO_Register_1::tSMIO_Register_1()
{
}

inline tCHInCh::tSMIO_Register_1::tRegisterMap* tCHInCh::tSMIO_Register_1::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tSMIO_Register_1::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tSMIO_Register_1::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tSMIO_Register_1::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tSMIO_Register_1::writeSMIO_Register_1_Value(nCHInCh::tSMIO_Register_1_Value_t fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline nCHInCh::tSMIO_Register_1_Value_t tCHInCh::tSMIO_Register_1::readSMIO_Register_1_Value(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return nCHInCh::tSMIO_Register_1_Value_t((value & ~0x0) >> 0x0);
}

inline tCHInCh::tSMIO_Register_2::tSMIO_Register_2()
{
}

inline tCHInCh::tSMIO_Register_2::tRegisterMap* tCHInCh::tSMIO_Register_2::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tSMIO_Register_2::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tSMIO_Register_2::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tSMIO_Register_2::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tSMIO_Register_2::writeSMIO_Register_2_Value(nCHInCh::tSMIO_Register_2_Value_t fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline nCHInCh::tSMIO_Register_2_Value_t tCHInCh::tSMIO_Register_2::readSMIO_Register_2_Value(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return nCHInCh::tSMIO_Register_2_Value_t((value & ~0x0) >> 0x0);
}

inline tCHInCh::tSMIO_Register_3::tSMIO_Register_3()
{
}

inline tCHInCh::tSMIO_Register_3::tRegisterMap* tCHInCh::tSMIO_Register_3::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tSMIO_Register_3::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline void tCHInCh::tSMIO_Register_3::writeRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return;
   tIOStrategy::write(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), fieldValue, s);
}

inline u32 tCHInCh::tSMIO_Register_3::readRegister(nMDBG::tStatus2* s)
{
   u32 fieldValue;
   fieldValue = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
   return fieldValue;
}

inline void tCHInCh::tSMIO_Register_3::writeSMIO_Register_3_Value(nCHInCh::tSMIO_Register_3_Value_t fieldValue, nMDBG::tStatus2* s)
{
   writeRegister((u32(fieldValue) << 0x0) & ~0x0,s);
}
inline nCHInCh::tSMIO_Register_3_Value_t tCHInCh::tSMIO_Register_3::readSMIO_Register_3_Value(nMDBG::tStatus2* s)
{
   u32 value = readRegister(s);
   return nCHInCh::tSMIO_Register_3_Value_t((value & ~0x0) >> 0x0);
}

inline tCHInCh::tPCI_SubSystem_ID_Access_Register::tPCI_SubSystem_ID_Access_Register()
{
   _softCopy = u32(0x0);
}

inline tCHInCh::tPCI_SubSystem_ID_Access_Register::tRegisterMap* tCHInCh::tPCI_SubSystem_ID_Access_Register::registerMap(void)
{
   return _regMap;
}

inline void tCHInCh::tPCI_SubSystem_ID_Access_Register::setRegisterMap(tRegisterMap* pRegMap)
{
   _regMap = pRegMap;
}

inline tCHInCh::tPCI_SubSystem_ID_Access_Register& tCHInCh::tPCI_SubSystem_ID_Access_Register::setRegister(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   _softCopy = fieldValue;
   return *this;
}

inline u32 tCHInCh::tPCI_SubSystem_ID_Access_Register::getRegister(nMDBG::tStatus2*) const
{
   return _softCopy;
}

inline void tCHInCh::tPCI_SubSystem_ID_Access_Register::refresh(nMDBG::tStatus2* s)
{
   _softCopy = tIOStrategy::read(_regMap->getBusSpaceReference(), kOffset + _regMap->getAddressOffset(s), s);
}

inline u32 tCHInCh::tPCI_SubSystem_ID_Access_Register::readRegister(nMDBG::tStatus2* s)
{
   refresh(s);
   return _softCopy;
}

inline tCHInCh::tPCI_SubSystem_ID_Access_Register& tCHInCh::tPCI_SubSystem_ID_Access_Register::setSubSystem_Vendor_ID(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffff0000) | ((u32(fieldValue) << 0x0) & ~0xffff0000);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tPCI_SubSystem_ID_Access_Register::getSubSystem_Vendor_ID(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffff0000) >> 0x0);
}

inline u32 tCHInCh::tPCI_SubSystem_ID_Access_Register::readSubSystem_Vendor_ID(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSubSystem_Vendor_ID(s);
}

inline tCHInCh::tPCI_SubSystem_ID_Access_Register& tCHInCh::tPCI_SubSystem_ID_Access_Register::setSubSystem_Product_ID(u32 fieldValue, nMDBG::tStatus2* s)
{
   if (s && s->isFatal()) return *this;
   u32 newValue;   newValue = (_softCopy & 0xffff) | ((u32(fieldValue) << 0x10) & ~0xffff);
   setRegister(newValue, s);
   return *this;
}

inline u32 tCHInCh::tPCI_SubSystem_ID_Access_Register::getSubSystem_Product_ID(nMDBG::tStatus2*) const
{
   return u32((_softCopy & ~0xffff) >> 0x10);
}

inline u32 tCHInCh::tPCI_SubSystem_ID_Access_Register::readSubSystem_Product_ID(nMDBG::tStatus2* s)
{
   refresh(s);
   return getSubSystem_Product_ID(s);
}

#endif


// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!
// This file is autogenerated!!!
// !!!!!!!!!!!!!!!!!!!!!!!!!!!!!